Parallel Process. Lett.最新文献_第6页

Proper Coloring Distance in Edge-Colored Cartesian Products of Complete Graphs and Cycles 完全图与环的边色笛卡尔积的适当着色距离

Parallel Process. Lett. Pub Date : 2019-12-01 DOI: 10.1142/s0129626419500166

Ajay Arora, E. Cheng, Colton Magnant

引用次数: 0

The Restricted Edge-Connectivity of Kronecker Product Graphs Kronecker积图的受限边连通性

Parallel Process. Lett. Pub Date : 2019-10-01 DOI: 10.1142/s0129626419500129

Tianlong Ma, Jinling Wang, Mingzu Zhang

引用次数: 2

Applied On-Chip Machine Learning for Dynamic Resource Control in Multithreaded Processors 片上机器学习在多线程处理器动态资源控制中的应用

Parallel Process. Lett. Pub Date : 2019-10-01 DOI: 10.1142/s0129626419500130

Shane Carroll, Wei-Ming Lin

{"title":"Applied On-Chip Machine Learning for Dynamic Resource Control in Multithreaded Processors","authors":"Shane Carroll, Wei-Ming Lin","doi":"10.1142/s0129626419500130","DOIUrl":"https://doi.org/10.1142/s0129626419500130","url":null,"abstract":"In this paper, we propose a machine learning algorithm to control instruction fetch bandwidth in a simultaneous multithreaded CPU. In a simultaneous multithreaded CPU, multiple threads occupy pools of hardware resources in the same clock cycle. Under some conditions, one or more threads may undergo a period of inefficiency, e.g., a cache miss, thereby inefficiently using shared resources and degrading the performance of other threads. If these inefficiencies can be identified at runtime, the offending thread can be temporarily blocked from fetching new instructions into the pipeline and given time to recover from its inefficiency, and prevent the shared system resources from being wasted on a stalled thread. In this paper, we propose a machine learning approach to determine when a thread should be blocked from fetching new instructions. The model is trained offline and the parameters embedded in a CPU, which can be queried with runtime statistics to determine if a thread is running inefficiently and should be temporarily blocked from fetching. We propose two models: a simple linear model and a higher-capacity neural network. We test each model in a simulation environment and show that system performance can increase by up to 19% on average with a feasible implementation of the proposed algorithm.","PeriodicalId":422436,"journal":{"name":"Parallel Process. Lett.","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126241029","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Quantum Fuzzy Game Simulation 量子模糊博弈仿真

Parallel Process. Lett. Pub Date : 2019-10-01 DOI: 10.1142/s0129626419500105

R. Alonso-Sanz, Haozhen Situ

引用次数: 1

The Connectivity of a Bipartite Graph and Its Bipartite Complementary Graph 二部图及其二部补图的连通性

Parallel Process. Lett. Pub Date : 2019-09-26 DOI: 10.1142/S0129626420400058

Yingzhi Tian, Huaping Ma, Liyun Wu

引用次数: 0

A Note of Independent Number and Domination Number of Qn, k, m-Graph 图Qn, k, m的独立数和支配数的注记

Parallel Process. Lett. Pub Date : 2019-09-01 DOI: 10.1142/s0129626419500117

Jiafei Liu, Shuming Zhou, Zhendong Gu, Yihong Wang, Qianru Zhou

{"title":"A Note of Independent Number and Domination Number of Qn, k, m-Graph","authors":"Jiafei Liu, Shuming Zhou, Zhendong Gu, Yihong Wang, Qianru Zhou","doi":"10.1142/s0129626419500117","DOIUrl":"https://doi.org/10.1142/s0129626419500117","url":null,"abstract":"The independent number and domination number are two essential parameters to assess the resilience of the interconnection network of multiprocessor systems which is usually modeled by a graph. The independent number, denoted by [Formula: see text], of a graph [Formula: see text] is the maximum cardinality of any subset [Formula: see text] such that no two elements in [Formula: see text] are adjacent in [Formula: see text]. The domination number, denoted by [Formula: see text], of a graph [Formula: see text] is the minimum cardinality of any subset [Formula: see text] such that every vertex in [Formula: see text] is either in [Formula: see text] or adjacent to an element of [Formula: see text]. But so far, determining the independent number and domination number of a graph is still an NPC problem. Therefore, it is of utmost importance to determine the number of independent and domination number of some special networks with potential applications in multiprocessor system. In this paper, we firstly resolve the exact values of independent number and upper and lower bound of domination number of the [Formula: see text]-graph, a common generalization of various popular interconnection networks. Besides, as by-products, we derive the independent number and domination number of [Formula: see text]-star graph [Formula: see text], [Formula: see text]-arrangement graph [Formula: see text], as well as three special graphs.","PeriodicalId":422436,"journal":{"name":"Parallel Process. Lett.","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128353637","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Parallel Architecture of Reconfigurable Hardware for Massive Output Active Noise Control 面向大输出主动噪声控制的可重构硬件并行结构

Parallel Process. Lett. Pub Date : 2019-09-01 DOI: 10.1142/s0129626419500142

Diego Mendez, David Arevalo, Diego Patino, E. Gerlein, Ricardo Quintana

{"title":"Parallel Architecture of Reconfigurable Hardware for Massive Output Active Noise Control","authors":"Diego Mendez, David Arevalo, Diego Patino, E. Gerlein, Ricardo Quintana","doi":"10.1142/s0129626419500142","DOIUrl":"https://doi.org/10.1142/s0129626419500142","url":null,"abstract":"Filtered-x Least Mean Squares (FxLMS) is an algorithm commonly used for Active Noise Control (ANC) systems in order to cancel undesired acoustic waves from a sound source. There is a small number of hardware designs reported in the literature, that in turn only use one reference signal, one error signal and one output control signal. In this paper, it is proposed a 3-dimensional hardware-based version of the widely used FxLMS algorithm, using one reference microphone, 18 error microphones, one output and a FIR filter of 400[Formula: see text] order. The FxLMS algorithm was implemented in a Xilinx Artix 7 FPGA running at 25 MHz, which allowed to update the filter coefficients in 32.44[Formula: see text] s. The main idea behind this work is to propose a pipelined parallelized architecture to achieve processing times faster than real time for the filter coefficients update. The main contribution of this work is not the ANC technique itself, but rather the proposed hardware implementation that utilizes integer arithmetic, which provided an acceptable error when benchmarked with a software implementation. This parallel system allows a scalable implementation as an advantage of using FPGA without compromising the computational cost and, consequently, the latency.","PeriodicalId":422436,"journal":{"name":"Parallel Process. Lett.","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121031568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Elastic Parallel Systems for High Performance Cloud Computing: State-of-the-Art and Future Directions 用于高性能云计算的弹性并行系统:最新技术和未来方向

Parallel Process. Lett. Pub Date : 2019-08-01 DOI: 10.1142/S0129626419500063

Stefan Kehrer, W. Blochinger

{"title":"Elastic Parallel Systems for High Performance Cloud Computing: State-of-the-Art and Future Directions","authors":"Stefan Kehrer, W. Blochinger","doi":"10.1142/S0129626419500063","DOIUrl":"https://doi.org/10.1142/S0129626419500063","url":null,"abstract":"With on-demand access to compute resources, pay-per-use, and elasticity, the cloud evolved into an attractive execution environment for High Performance Computing (HPC). Whereas elasticity, which is often referred to as the most beneficial cloud-specific property, has been heavily used in the context of interactive (multi-tier) applications, elasticity-related research in the HPC domain is still in its infancy. Existing parallel computing theory as well as traditional metrics to analytically evaluate parallel systems do not comprehensively consider elasticity, i.e., the ability to control the number of processing units at runtime. To address these issues, we introduce a conceptual framework to understand elasticity in the context of parallel systems, define the term elastic parallel system, and discuss novel metrics for both elasticity control at runtime as well as the ex-post performance evaluation of elastic parallel systems. Based on the conceptual framework, we provide an in-depth analysis of existing research in the field to describe the state-of-the-art and compile our findings into a research agenda for future research on elastic parallel systems.","PeriodicalId":422436,"journal":{"name":"Parallel Process. Lett.","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114249116","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Scalable Sender-Based Message Logging Protocol with Little Communication Overhead for Distributed Systems 分布式系统中通信开销小的可扩展的基于发送者的消息日志记录协议

Parallel Process. Lett. Pub Date : 2019-08-01 DOI: 10.1142/S0129626419500051

Jinho Ahn

引用次数: 3

Leader Election Requires Logarithmic Time in Population Protocols 群体协议中领袖选举需要对数时间

Parallel Process. Lett. Pub Date : 2019-06-25 DOI: 10.1142/s012962642050005x

Y. Sudo, T. Masuzawa

引用次数: 13