2009 International Test Conference最新文献_第2页

Eliminating product infant mortality failures using prognostic analysis 使用预后分析消除产品婴儿死亡率失败

2009 International Test Conference Pub Date : 2009-12-18 DOI: 10.1109/TEST.2009.5355817

L. Losik

引用次数: 0

Cache-resident self-testing for I/O circuitry I/O电路的缓存驻留自检

2009 International Test Conference Pub Date : 2009-12-18 DOI: 10.1109/TEST.2009.5355549

Sankar Gurumurthy, D. Bertanzetti, P. Jakobsen, J. Rearick

引用次数: 4

On-chip power supply noise measurement using Time Resolved Emission (TRE) waveforms of Light Emission from Off-State Leakage Current (LEOSLC) 片上电源噪声的时间分辨发射(TRE)波形测量

2009 International Test Conference Pub Date : 2009-12-18 DOI: 10.1109/TEST.2009.5355543

F. Stellari, P. Song, J. Sylvestri, D. Miles, Orazio P. Forlenza, D. Forlenza

引用次数: 4

Built-in Self Test for Error Vector Magnitude measurement of RF transceiver 内置自测试误差矢量测量射频收发器

2009 International Test Conference Pub Date : 2009-12-18 DOI: 10.1109/TEST.2009.5355906

Bilal El Kassir, C. Kelma, B. Jarry, M. Campovecchio

引用次数: 3

A development platform and electronic modules for automated test up to 20 Gbps 一个开发平台和电子模块，用于高达20 Gbps的自动化测试

2009 International Test Conference Pub Date : 2009-12-18 DOI: 10.1109/TEST.2009.5355701

D. Keezer, C. Gray, A. Majid, D. Minier, P. Ducharme

{"title":"A development platform and electronic modules for automated test up to 20 Gbps","authors":"D. Keezer, C. Gray, A. Majid, D. Minier, P. Ducharme","doi":"10.1109/TEST.2009.5355701","DOIUrl":"https://doi.org/10.1109/TEST.2009.5355701","url":null,"abstract":"An adaptable platform for the development of customized ATE and test-support modules is described. The purpose of the platform is to provide a hardware framework for assembling combinations of specialized test modules for applications that are not well addressed by conventional general-purpose ATE alone. The platform can also be used to test, characterize, and calibrate individual modules prior to use within either a platform-based application or within a traditional ATE environment. The paper describes some of the salient features of the platform and one completed example for an all-optical packet-switching network called “Data Vortex” operating at 2.5Gbps on each of 18 channels (≫40Gbps aggregate burst data rate). Two other example modules demonstrate even higher data rates. One is a dual-channel, bidirectional 5Gbps FPGA-based module with loopback, jitter-injection, and 2:1 XOR multiplexing (up to 10Gbps). This module exploits recent advances in FPGA technology that enable very high data rates at relatively low cost. Another example module synthesizes two 10Gbps data streams using 16:1 SiGe serializers; and then combines these using an InP XOR gate to form a 20Gbps test stimulus channel. While the platform and modules have interesting characteristics, individually they do not form a complete solution. However the various possible combinations, together with special-purpose modules, may help solve some of the most difficult test applications in the near future. Therefore, this paper tries to present the key features in a way that the reader may extrapolate to future test challenges.","PeriodicalId":419063,"journal":{"name":"2009 International Test Conference","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127853124","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 15

A novel multisite testing techniques by using frequency synthesizer 一种基于频率合成器的多站点测试新技术

2009 International Test Conference Pub Date : 2009-12-18 DOI: 10.1109/TEST.2009.5355814

Boyon Kim, Il-Chan Park, G. Song, Wooseong Choi, Byeong-Yun Kim, Kyu-Hoon Lee, Chi-young Choi

引用次数: 0

A novel architecture for on-chip path delay measurement 一种新的片上路径延迟测量体系结构

2009 International Test Conference Pub Date : 2009-12-18 DOI: 10.1109/TEST.2009.5355742

Xiaoxiao Wang, M. Tehranipoor, R. Datta

引用次数: 34

Portable simulation/emulation stimulus on an industrial-strength SoC 工业级SoC上的便携式仿真/仿真刺激

2009 International Test Conference Pub Date : 2009-12-18 DOI: 10.1109/TEST.2009.5355904

Francisco Torres, Rohit Srivastava, Javier Ruiz, Charles H.-P. Wen, Mrinal Bose, J. Bhadra

引用次数: 0

Data learning techniques and methodology for Fmax prediction Fmax预测的数据学习技术和方法

2009 International Test Conference Pub Date : 2009-12-18 DOI: 10.1109/TEST.2009.5355620

Janine Chen, Li-C. Wang, Po-Hsien Chang, Jing Zeng, Stanley Yu, Michael Mateja

引用次数: 35

Post-silicon validation: It's the unique fails that hurt you 后硅验证:只有独特的失败才会伤害到你

2009 International Test Conference Pub Date : 2009-12-18 DOI: 10.1109/TEST.2009.5355599

P. Ahuja

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引用次数: 2