2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)最新文献_第9页

Performance and Accuracy in Soft-Error Resilience Evaluation using the Multi-Level Processor Simulator ETISS-ML 基于多级处理器模拟器的软错误弹性评估的性能和准确性

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2018-11-05 DOI: 10.1145/3240765.3243490

Daniel Mueller-Gritschneder, Uzair Sharif, Ulf Schlichtmann

{"title":"Performance and Accuracy in Soft-Error Resilience Evaluation using the Multi-Level Processor Simulator ETISS-ML","authors":"Daniel Mueller-Gritschneder, Uzair Sharif, Ulf Schlichtmann","doi":"10.1145/3240765.3243490","DOIUrl":"https://doi.org/10.1145/3240765.3243490","url":null,"abstract":"Soft errors are a major safety concern in many devices, e.g., in automotive, industrial, control or medical applications. Ideally, safety-critical systems should be resilient against the impact of soft errors, but at a low cost. This requires to evaluate the soft error resilience, which is typically done by extensive fault injection. In this paper, we present ETISS-ML, a multi-level processor simulator, which manages to achieve both accuracy and performance for fault simulation by intelligently switching the level of abstraction between an Instruction Set Simulator (ISS) and an RTL simulator. For a given software testcase and fault scenario, the software is first executed in ISS-mode until shortly before the fault injection. Then ETISS-ML switches to RTL-mode for accurate fault simulation. Whenever the impact of the fault is propagated completely out of the processor's micro-architecture, the simulation can switch back to ISS-mode. This paper describes the methods needed to preserve accuracy during both of these switches. Experimental results show that ETISS-ML obtains near to ISS performance with RTL accuracy. It is also shown that ETISS-ML can be used as the processor model in SystemC / TLM virtual prototypes (VPs) and, hence, allows to investigate the impact of soft errors at system level.","PeriodicalId":413037,"journal":{"name":"2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131121890","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 15

Failure Prediction Based on Anomaly Detection for Complex Core Routers 基于异常检测的复杂核心路由器故障预测

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2018-11-05 DOI: 10.1145/3240765.3243476

Shi Jin, Zhaobo Zhang, K. Chakrabarty, Xinli Gu

引用次数: 8

Watermarking Deep Neural Networks for Embedded Systems 嵌入式系统的深度神经网络水印

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2018-11-05 DOI: 10.1145/3240765.3240862

Jiabao Guo, M. Potkonjak

引用次数: 116

Mixed Size Crossbar based RRAM CNN Accelerator with Overlapped Mapping Method 基于重叠映射法的混合尺寸横杆RRAM CNN加速器

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2018-11-05 DOI: 10.1145/3240765.3240825

Zhenhua Zhu, Jilan Lin, Ming Cheng, Lixue Xia, Hanbo Sun, Xiaoming Chen, Yu Wang, Huazhong Yang

{"title":"Mixed Size Crossbar based RRAM CNN Accelerator with Overlapped Mapping Method","authors":"Zhenhua Zhu, Jilan Lin, Ming Cheng, Lixue Xia, Hanbo Sun, Xiaoming Chen, Yu Wang, Huazhong Yang","doi":"10.1145/3240765.3240825","DOIUrl":"https://doi.org/10.1145/3240765.3240825","url":null,"abstract":"Convolutional Neural Networks (CNNs) play a vital role in machine learning. CNNs are typically both computing and memory intensive. Emerging resistive random-access memories (RRAMs) and RRAM crossbars have demonstrated great potentials in boosting the performance and energy efficiency of CNNs. Compared with small crossbars, large crossbars show better energy efficiency with less interface overhead. However, conventional workload mapping methods for small crossbars cannot make full use of the computation ability of large crossbars. In this paper, we propose an Overlapped Mapping Method (OMM) and MIxed Size Crossbar based RRAM CNN Accelerator (MISCA) to solve this problem. MISCA with OMM can reduce the energy consumption caused by the interface circuits, and improve the parallelism of computation by leveraging the idle RRAM cells in crossbars. The simulation results show that MISCA with OMM can achieve 2.7× speedup, 30% utilization rate improvement, and 1.2× energy efficiency improvement on average compared with fixed size crossbars based accelerator using the conventional mapping method. In comparison with GPU platform, MISCA with OMM can perform 490.4× higher on average in energy efficiency and 20× higher on average in speedup. Compared with PRIME, an existing RRAM based accelerator, MISCA has 26.4× speedup and 1.65× energy efficiency improvement.","PeriodicalId":413037,"journal":{"name":"2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"149 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123342033","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 31

Multi-Physics-based FEM Analysis for Post-voiding Analysis of Electromigration Failure Effects 基于多物理场的电解后电迁移失效效应有限元分析

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2018-11-05 DOI: 10.1145/3240765.3243486

Hengyang Zhao, S. Tan

{"title":"Multi-Physics-based FEM Analysis for Post-voiding Analysis of Electromigration Failure Effects","authors":"Hengyang Zhao, S. Tan","doi":"10.1145/3240765.3243486","DOIUrl":"https://doi.org/10.1145/3240765.3243486","url":null,"abstract":"In this paper, we propose a new multi-physics finite element method (FEM) based analysis method for void growth simulation of confined copper interconnects. This new method for the first time considers three important physics simultaneously in the EM failure process and their time-varying interactions: the hydrostatic stress in the confined interconnect wire, the current density and Joule heating induced temperature. As a result, we end up with solving a set of coupled partial differential equations which consist of the stress diffusion equation (Korhonen's equation), the phase field equation (for modeling void boundary move), the Laplace equation for current density and the heat diffusion equation for Joule heating and wire temperature. In the new method, we show that each of the physics will have different physical domains and differential boundary conditions, and how such coupled multi-physics transient analysis was carried out based on FEM and different time scales are properly handled. Experiment results show that by considering all three coupled physics - the stress, current density, and temperature - and their transient behaviors, the proposed FEM EM solver can predict the unique transient wire resistance change pattern for copper interconnect wires, which were well observed by the published experiment data. We also show that the simulated void growth speed is less conservative than recently proposed compact EM model.","PeriodicalId":413037,"journal":{"name":"2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"145 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123621107","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

Design and Algorithm for Clock Gating and Flip-flop Co-optimization 时钟门控与触发器协同优化的设计与算法

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2018-11-05 DOI: 10.1145/3240765.3240793

Giyoung Yang, Taewhan Kim

引用次数: 6

Physical Modeling of Bitcell Stability in Subthreshold SRAMs for Leakage–Area Optimization under PVT Variations 基于PVT变化的亚阈值sram泄漏面积优化的Bitcell稳定性物理建模

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2018-11-05 DOI: 10.1145/3240765.3240836

Xin Fan, Rui Wang, T. Gemmeke

{"title":"Physical Modeling of Bitcell Stability in Subthreshold SRAMs for Leakage–Area Optimization under PVT Variations","authors":"Xin Fan, Rui Wang, T. Gemmeke","doi":"10.1145/3240765.3240836","DOIUrl":"https://doi.org/10.1145/3240765.3240836","url":null,"abstract":"Subthreshold SRAM design is crucial for addressing the memory bottleneck in energy constrained applications. While statistical optimization can be applied based on Monte-Carlo (MC) simulation, exploration of bitcell design space is time consuming. This paper presents a framework for model-based design and optimization of subthreshold SRAM bitcells under random PVT variations. By incorporating key design and process features, a physical model of bitcell static noise margin (SNM) has been derived analytically. It captures intra-die SNM variations by the combination of a folded-normal distribution and a non-central chi-squared distribution. Validations with MC simulation show its accuracy of modeling SNM distributions down to 25mV beyond 6-sigma for typical bitcells in 28nm. Model-based tuning of subthreshold SRAM bitcells is investigated for design tradeoff between leakage, area and stability. When targeting a specific SNM constraint, we show that an optimal standby voltage exists which offers minimum bitcell leakage power – any deviation above or below increases the power consumption. When targeting a specific standby voltage, our design flow identifies bitcell instances of 12× less leakage power or 3× reductions in area as compared to the minimum-length design.","PeriodicalId":413037,"journal":{"name":"2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125153735","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Algorithm-Hardware Co-Design of Single Shot Detector for Fast Object Detection on FPGAs 基于fpga的单镜头快速目标检测算法-硬件协同设计

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2018-11-05 DOI: 10.1145/3240765.3240775

Yufei Ma, Tu Zheng, Yu Cao, S. Vrudhula, Jae-sun Seo

引用次数: 17

Online Learning for Adaptive Optimization of Heterogeneous SoCs 异构soc自适应优化的在线学习

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2018-11-05 DOI: 10.1145/3240765.3243489

Ganapati Bhat, Sumit K. Mandal, U. Gupta, Ümit Y. Ogras

引用次数: 8

Differentiated Handling of Physical Scenes and Virtual Objects for Mobile Augmented Reality 移动增强现实中物理场景和虚拟对象的差异化处理

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2018-11-05 DOI: 10.1145/3240765.3240798

Chih-Hsuan Yen, Wei-Ming Chen, P. Hsiu, Tei-Wei Kuo

引用次数: 2