2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC)最新文献_第2页

Hardlock: A Concurrent Real-Time Multicore Locking Unit 硬锁:并发实时多核锁定单元

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC) Pub Date : 2018-05-29 DOI: 10.1109/ISORC.2018.00010

Tórur Biskopstø Strøm, Martin Schoeberl

引用次数: 3

IoT Data Integrity Verification for Cyber-Physical Systems Using Blockchain 使用区块链的网络物理系统的物联网数据完整性验证

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC) Pub Date : 2018-05-29 DOI: 10.1109/ISORC.2018.00019

Caciano Machado, A. A. Fröhlich

{"title":"IoT Data Integrity Verification for Cyber-Physical Systems Using Blockchain","authors":"Caciano Machado, A. A. Fröhlich","doi":"10.1109/ISORC.2018.00019","DOIUrl":"https://doi.org/10.1109/ISORC.2018.00019","url":null,"abstract":"Blockchain technologies can enable decentralized and trustful features for the Internet of Things (IoT). Although, existing blockchain based solutions to provide data integrity verification for semi-trusted data storages (e.g. cloud providers) cannot respect the time determinism required by Cyber-Physical Systems (CPS). Additionally, they cannot be applied to resource-constrained IoT devices. We propose an architecture that can take advantage of blockchain features to allow further integrity verification of data produced by IoT devices even in the realm of CPS. Our architecture is divided into three levels, each of them responsible for tasks compatible with their resources capabilities. The first level, composed of sensors, actuators, and gateways, introduces the concept of Proof-of-Trust (PoT), an energy-efficient, time-deterministic and secure communication based on the Trustful Space-Time Protocol (TSTP). Upper levels are responsible for data persistence and integrity verification in the Cloud. The work also comprises a performance evaluation of the critical path of data to demonstrate that the architecture respect time-bounded operations demanded by the sense-decide-actuate cycle of CPSs. The additional delay of 5.894us added by our architecture is negligible for a typical TSTP with IEEE 802.15.4 radios which has communication latencies in the order of hundreds of milisseconds in each hop.","PeriodicalId":395536,"journal":{"name":"2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC)","volume":"6 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120994145","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 54

Real-Time ROS Extension on Transparent CPU/GPU Coordination Mechanism 基于透明CPU/GPU协调机制的实时ROS扩展

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC) Pub Date : 2018-05-29 DOI: 10.1109/ISORC.2018.00035

Yuhei Suzuki, Takuya Azumi, S. Kato, N. Nishio

{"title":"Real-Time ROS Extension on Transparent CPU/GPU Coordination Mechanism","authors":"Yuhei Suzuki, Takuya Azumi, S. Kato, N. Nishio","doi":"10.1109/ISORC.2018.00035","DOIUrl":"https://doi.org/10.1109/ISORC.2018.00035","url":null,"abstract":"Robot Operating System (ROS) promotes fault isolation, faster development, modularity, and core reusability and is therefore widely studied and used as the de facto standard for autonomous driving systems. Graphics processing units (GPUs) also facilitate high-performance computing and are therefore used for autonomous driving. As the requirements for real-time processing increase, methods for satisfying real-time constraints for ROS and GPUs are being developed. Unfortunately, scheduling algorithms specifying ROS's transportation (publish/subscribe) model, which can have execution order restrictions, are not being investigated, leading to the introduction of waiting time and degrading the responsiveness of the entire system. Furthermore, GPU tasks on ROS are also affected by the ROS transportation model, because central processing unit (CPU) time is occupied when GPU functions are launched. This paper proposes a loadable kernel module framework, called real-time ROS extension on transparent CPU/GPU coordination mechanism (ROSCH-G), for scheduling ROS in a heterogeneous environment without modifying the OS kernel and device drivers and then evaluates it experimentally. ROSCH-G provides a scheduling algorithm that considers ROS's execution order restrictions and a CPU/GPU coordination mechanism. Experimental results demonstrate that the proposed algorithm reduces the deadline miss rate and, compared with previous studies, makes effective use of the benefits of parallel processing. In addition, the results for the coordination mechanism demonstrate that ROSCH-G can schedule multiple GPU applications successfully.","PeriodicalId":395536,"journal":{"name":"2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130338799","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 15

Scalable and Memory-Efficient Spin Locks for Embedded Tile-Based Many-Core Architectures 嵌入式多核架构的可扩展和内存高效自旋锁

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC) Pub Date : 2018-05-29 DOI: 10.1109/ISORC.2018.00012

Shinichi Awamoto, Hiroyuki Chishiro, S. Kato

引用次数: 1

Faster Function Blocks for Precision Timed Industrial Automation 更快的功能块精确定时工业自动化

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC) Pub Date : 2018-05-29 DOI: 10.1109/ISORC.2018.00017

H. Pearce, P. Roop, M. Biglari-Abhari, Martin Schoeberl

{"title":"Faster Function Blocks for Precision Timed Industrial Automation","authors":"H. Pearce, P. Roop, M. Biglari-Abhari, Martin Schoeberl","doi":"10.1109/ISORC.2018.00017","DOIUrl":"https://doi.org/10.1109/ISORC.2018.00017","url":null,"abstract":"In industrial automation, safety-critical control systems need robust timing guarantees in addition to functional correctness. Unfortunately, devices that are typically used in this domain, such as Programmable Logic Controllers, often feature architectures that are not amenable to static timing analysis, for instance relying on general purpose microprocessors or embedded operating systems. As a result, designers often rely on timing values gained from simple measurement of running applications, an approach that only provides very weak guarantees at best. The synchronous approach for IEC 61499 Function Blocks, in contrast, has been demonstrated to be time predictable when run on appropriate hardware, such as simple microprocessors. However, simple microprocessors are often not fast or powerful enough for modern automation requirements. In this paper, we examine how the performance of synchronous IEC 61499 can be improved through the usage of the multi-core T-CREST architecture, data scratchpads, and an optimised compiler. Overall, our improvements resulted in 60% shorter worst-case execution times.","PeriodicalId":395536,"journal":{"name":"2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC)","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116142588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Data Freshness Over-Engineering: Formulation and Results 数据新鲜度过度工程:公式和结果

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC) Pub Date : 2018-05-29 DOI: 10.1109/ISORC.2018.00034

Dagaen Golomb, Deepak Gangadharan, Sanjian Chen, O. Sokolsky, Insup Lee

引用次数: 5

A Self-Reconfiguring Cache Architecture to Improve Control Quality in Cyber-Physical Systems 一种自重新配置的高速缓存架构以改善资讯物理系统的控制品质

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC) Pub Date : 2018-05-29 DOI: 10.1109/ISORC.2018.00024

M. S. Haque, Sriram Vasudevan, Alamuri Sriram Nihar, A. Easwaran, Akash Kumar, Y. Tay

{"title":"A Self-Reconfiguring Cache Architecture to Improve Control Quality in Cyber-Physical Systems","authors":"M. S. Haque, Sriram Vasudevan, Alamuri Sriram Nihar, A. Easwaran, Akash Kumar, Y. Tay","doi":"10.1109/ISORC.2018.00024","DOIUrl":"https://doi.org/10.1109/ISORC.2018.00024","url":null,"abstract":"Quality of control is a critical concern in Cyber-Physical Systems (CPS) which are comprised of multiple intercommunicating control applications. Due to complex timing behaviour of these systems, poor quality of control can lead to catastrophe. Recent studies showed that, conflict miss increment in the processor cache memory shared by concurrently running control applications can degrade control quality in CPS significantly. Increasing cache associativity can help to reduce conflict misses. However, the existing reconfigurable cache architectures that allow runtime modification of cache associativity are not capable to guaranty a newly chosen associativity's suitability for the forthcoming control quality requirement. Moreover, they have timing and energy related overheads. In this regard, this paper presents a novel, self-reconfiguring cache memory architecture \"SeReMo\". When conflict misses increase significantly, SeReMo reconfigures its associativity to better suit the current as well as future control quality demand. To trigger reconfiguration, a low overhead, non-strictly inclusive cache hierarchy-specific approach is used. Configurations with different associativity are generated using modules made of 4 cache lines and 7 special bits. Special replacement policy and indexing scheme are used to suit modular reconfiguration. SPEC CPU 2006 benchmark trace-driven simulation reveals that SeReMo reduces average number of conflict misses per line to 1/12951 of the state-of-the-art reconfigurable cache architecture at maximum (to 1/830 on average). As a result, execution time and energy consumption reduce by 48 hours at maximum (by 2/3 on average) and by 2907 Joules at maximum (86% on average) respectively.","PeriodicalId":395536,"journal":{"name":"2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123694853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

SITSA-RT: An Information Theory Inspired Real-Time Multiprocessor Scheduler SITSA-RT:一个受信息论启发的实时多处理器调度程序

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC) Pub Date : 2018-05-29 DOI: 10.1109/ISORC.2018.00032

C. Rincón C., A. Cheng

{"title":"SITSA-RT: An Information Theory Inspired Real-Time Multiprocessor Scheduler","authors":"C. Rincón C., A. Cheng","doi":"10.1109/ISORC.2018.00032","DOIUrl":"https://doi.org/10.1109/ISORC.2018.00032","url":null,"abstract":"In this paper, we describe how Shannon's information theory is used to develop the Simplified Information-Theoretic Scheduling algorithm for Real-time Systems (SITSA-RT), and we explain the mechanism used by this algorithm to reduce the number of job migrations in real-time systems implemented in a multiprocessor platform. We present a performance comparison of the proposed algorithm with different multiprocessor scheduling algorithms for synthetic and real-case task sets. The results of the performance comparison for the synthetic task sets case show that outperforms all the studied EDF-based (up to 41.65%) and P-Fair based algorithms (up to 93.22%) in terms of the reduction of the number of job migrations while offering a similar performance in terms of the number of preemptions, the number of tasks migrations, and deadline miss ratio. These results show that as the utilization per task set and the number of processors increase, SITSA-RT is able to improve its performance in terms of the number of migrations. The results from the real-case task set based on NASA's X-38 avionics architecture show that for the scheduler execution time, MLLF improves the performance of SITSA-RT by 5.96% and SITSA-RT improves the performance of LLF by 19%, and from the memory requirements we found that MLLF usage is 13.48% lower than SITSA-RT, and SITSA-RT usage is 52.97% lower than LLF.","PeriodicalId":395536,"journal":{"name":"2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129490974","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Introducing Automatic Time Stamping (ATS) with a Reference Implementation in Swift 在Swift中引入自动时间戳(ATS)及其参考实现

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC) Pub Date : 2018-05-29 DOI: 10.1109/ISORC.2018.00028

Sean Hamilton, Dhiman Sengupta, Rajesh E. Gupta

{"title":"Introducing Automatic Time Stamping (ATS) with a Reference Implementation in Swift","authors":"Sean Hamilton, Dhiman Sengupta, Rajesh E. Gupta","doi":"10.1109/ISORC.2018.00028","DOIUrl":"https://doi.org/10.1109/ISORC.2018.00028","url":null,"abstract":"The need for associating a time with the arrival of data is prevalent in many applications but this is even more the case in Cyber Physical Systems (CPS) which measure quantities from the real world. One common attribute of any measured real world quantity is the time of when it was acquired. Automating the process of time stamping data upon arrival frees the programmer from having to deal with this task manually thus reducing the number of errors, shrinking the code size and making the code more readable and maintainable. This paper explores the concept of variables that are automatically time stamped by the runtime system and its impact in building real-time applications. Such time stamping support enables seamless integration of a time model that is kept updated by real-time events within well-defined synchronization time bounds. This paper discusses the design of the Automatic Time Stamping (ATS) framework and the prototype implementation of such variables using open source programming language Swift. Our results demonstrate the viability of the ATS framework for most real-time applications. In doing this work we have learned that the abstraction of time in software programming models still have much room for improvements from the operating system level all the way up to the programming languages and runtimes used by the developers.","PeriodicalId":395536,"journal":{"name":"2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC)","volume":"6 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126081669","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Design and Analysis for Dual Priority Scheduling 双优先级调度的设计与分析

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC) Pub Date : 2018-05-29 DOI: 10.1109/ISORC.2018.00033

Xiaozhe Gu, A. Easwaran, R. Pathan

{"title":"Design and Analysis for Dual Priority Scheduling","authors":"Xiaozhe Gu, A. Easwaran, R. Pathan","doi":"10.1109/ISORC.2018.00033","DOIUrl":"https://doi.org/10.1109/ISORC.2018.00033","url":null,"abstract":"This paper considers Dual Priority (DP) scheduling of constrained deadline sporadic tasks on uniprocessor. The initial fixed priority of each job of a task is promoted to a higher priority (called, promoted priority) after a fixed time interval (called, promotion point) relative to the release time of that job. DP scheduling alters the default preemptive behavior of traditional fixed priority (FP) scheduling to efficiently utilize the processor as close as possible to that of the optimal earliest deadline first (EDF) scheduler. In this paper, we address some of the main challenges of DP scheduling including derivation of a sufficient schedulability test, determination of promotion point of each task1. To the best of our knowledge, this test is the first schedulability test for DP scheduling applicable to constrained deadline sporadic tasks. The test is applicable for any given promotion points of the tasks and has pseudo-polynomial time complexity. We also propose two different heuristics to assign the promotion points, and experimental results show that the proposed test achieves performance very close to that of EDF scheduling.","PeriodicalId":395536,"journal":{"name":"2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC)","volume":"377 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133335532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1