Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284)最新文献

The theoretical performance of a class of space-time adaptive detection and training strategies for airborne radar 一类空时自适应机载雷达探测与训练策略的理论性能

Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284) Pub Date : 1998-12-01 DOI: 10.1109/ACSSC.1998.751541

C. Richmond

{"title":"The theoretical performance of a class of space-time adaptive detection and training strategies for airborne radar","authors":"C. Richmond","doi":"10.1109/ACSSC.1998.751541","DOIUrl":"https://doi.org/10.1109/ACSSC.1998.751541","url":null,"abstract":"First generation airborne radar systems were non-adaptive, performing such operations as moving target indication (MTI), synthetic aperture radar (SAR) imaging, and displaced phased center array (DPCA) data processing. In most cases the processing was separate in space and time (Doppler). Optimal joint space-time adaptive processing (STAP) methods for target detection and parameter estimation have been known for years but were computationally infeasible. Promising hardware technologies, however, have encouraged a revisitation of these optimal methods. The efforts of the DARPA sponsored Mountaintop Program brought to the surface some of the weaknesses of these algorithms (which were derived and therefore only optimal under rather ideal assumptions rarely satisfied in the real world). We consider the theoretical performance analysis of a class of STAP detection algorithms under ideal and non-ideal conditions including target steering vector mismatch, sidelobe targets and inhomogeneities, and the impact two of the training strategies (i) sliding window with de-emphasis and (ii) power selected training. The detection algorithms considered include the classical adaptive matched filter (AMF), the generalized likelihood ratio test (GLRT), and the more contemporary adaptive cosine estimator (ACE), and the 2-D adaptive sidelobe blanker (ASB).","PeriodicalId":393743,"journal":{"name":"Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131962222","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 20

Performance analysis of a subspace algorithm for cochannel TDMA signals 同信道TDMA信号的子空间算法性能分析

Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284) Pub Date : 1998-12-01 DOI: 10.1109/ACSSC.1998.751576

R. Chandrasekaran, Kuei-Chiang Lai, J. Shynk

引用次数: 0

Real-time sonar beamforming on a Unix workstation using process networks and POSIX threads 实时声纳波束形成在Unix工作站使用进程网络和POSIX线程

Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284) Pub Date : 1998-12-01 DOI: 10.1109/ACSSC.1998.751620

G. E. Allen, B. Evans, David C. Schanbacher

引用次数: 17

A recursive fast multiplier 递归快速乘法器

Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284) Pub Date : 1998-12-01 DOI: 10.1109/ACSSC.1998.750853

A. Danysh, E. Swartzlander

引用次数: 34

Adaptive sidelobe blanker: a novel method of performance evaluation and threshold setting in the presence of inhomogeneous clutter 自适应旁瓣消噪:一种非均匀杂波下性能评价和阈值设置的新方法

Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284) Pub Date : 1998-12-01 DOI: 10.1109/ACSSC.1998.750919

D. Kreithen, C. Pearson, C. Richmond

引用次数: 6

Multichannel integration for landcover classification in satellite imagery 卫星影像土地覆盖分类的多通道集成

Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284) Pub Date : 1998-12-01 DOI: 10.1109/ACSSC.1998.750930

S. Shah, J. Aggarwal

引用次数: 0

Optimal architectures for massively parallel implementation of hard real-time beamformers 硬实时波束形成器大规模并行实现的最佳架构

Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284) Pub Date : 1998-12-01 DOI: 10.1109/ACSSC.1998.751412

K. Watkins

引用次数: 0

A simple scheme for transmit diversity using partial channel feedback 利用部分信道反馈的一种简单的发射分集方案

Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284) Pub Date : 1998-12-01 DOI: 10.1109/ACSSC.1998.751427

R. Heath, A. Paulraj

引用次数: 176

Optimal joint azimuth-elevation and signal-array response estimation using parallel factor analysis 基于并行因子分析的最优联合方位-仰角和信号阵列响应估计

Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284) Pub Date : 1998-12-01 DOI: 10.1109/ACSSC.1998.751595

R. Bro, N. Sidiropoulos, G. Giannakis

引用次数: 17

Power comparison of flow-graph and distributed arithmetic based DCT architectures 基于流图和分布式算法的DCT体系结构的功率比较

Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284) Pub Date : 1998-12-01 DOI: 10.1109/ACSSC.1998.751519

M. Kuhlmann, K. Parhi

{"title":"Power comparison of flow-graph and distributed arithmetic based DCT architectures","authors":"M. Kuhlmann, K. Parhi","doi":"10.1109/ACSSC.1998.751519","DOIUrl":"https://doi.org/10.1109/ACSSC.1998.751519","url":null,"abstract":"The discrete cosine transform (DCT) is widely used in image and video compression systems. Two popular approaches to implementation of DCT algorithms include use of distributed arithmetic and flow-graphs based on fast algorithms. The distributed arithmetic architectures (DAA) have been widely used in many system implementations, due to their low latency and area requirements. However, no systematic study of power, area and latency tradeoffs of the DAA and the FGA have been studied. This paper presents a systematic study of area, latency and power consumption of these two alternate architectures. It is concluded that the flow-graph architecture consumes about 39% less power compared to the distributed arithmetic architecture, at the expenses of 28% more area and a 3.75 times increase in latency. Alternatively, by reducing the level of pipelining in the flowgraph architecture the implementation consumes 13% less power, at the expense of 20% more area and a tow times increase in latency. These results have been obtained by estimating the power consumption on actual layouts with effects of parasitic capacitance included as opposed to estimation of power consumption on schematics.","PeriodicalId":393743,"journal":{"name":"Conference Record of Thirty-Second Asilomar Conference on Signals, Systems and Computers (Cat. No.98CH36284)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125188643","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 16