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Second International Conference on Embedded Software and Systems (ICESS'05)最新文献

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Autonomous timeliness and reliability oriented information services integration and allocation in multi-agent systems 面向自主时效性和可靠性的多智能体系统信息服务集成与分配
Second International Conference on Embedded Software and Systems (ICESS'05) Pub Date : 2005-12-16 DOI: 10.1109/ICESS.2005.36
Xiaodong Lu, K. Mori
{"title":"Autonomous timeliness and reliability oriented information services integration and allocation in multi-agent systems","authors":"Xiaodong Lu, K. Mori","doi":"10.1109/ICESS.2005.36","DOIUrl":"https://doi.org/10.1109/ICESS.2005.36","url":null,"abstract":"Under dynamic and heterogenous environment, the need for adaptability and rapid response time to information service systems has become increasingly important. To cope with the continuously changing conditions of service provision and utilization, faded information field (FIF) has been proposed. In the case of a mono-service request, the system is designed to improve users' access time and preserve load balancing through the information structure. However, with interdependent requests of multi-service increasing, adaptability, reliability and timeliness have to be assured by the system. In this paper, the relationship between the timeliness and the reliability of correlated services allocation and access is clarified. Based on these factors, the autonomous network-based information services integration technology to provide one-stop service for users' multi-service requests is proposed. We proved the effectiveness of the proposed technology through the simulation and the results show that the integrated service can reduce the total users access time compared with the conventional systems.","PeriodicalId":360757,"journal":{"name":"Second International Conference on Embedded Software and Systems (ICESS'05)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129445247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design of an extremely high performance counter mode AES reconfigurable processor 一种高性能计数器型AES可重构处理器的设计
Second International Conference on Embedded Software and Systems (ICESS'05) Pub Date : 2005-12-16 DOI: 10.1109/ICESS.2005.43
Yongzhi Fu, Ling Hao, Xuejie Zhang, Rujin Yang
{"title":"Design of an extremely high performance counter mode AES reconfigurable processor","authors":"Yongzhi Fu, Ling Hao, Xuejie Zhang, Rujin Yang","doi":"10.1109/ICESS.2005.43","DOIUrl":"https://doi.org/10.1109/ICESS.2005.43","url":null,"abstract":"In this paper, we presented our implementation of a counter mode AES processor based on the Xilinx Virtex2 FPGA platform. We have studied different techniques to implement the AES rijndael algorithm in reconfigurable hardware and choose the proper method to further optimize the structure of the cipher. This result in a clock frequency of 212.5 mHz and translate to throughput of 27.1 Gb/s, the highest throughput that have ever reported. We also, in this paper, compared the operation modes of AES, their security and efficiency.","PeriodicalId":360757,"journal":{"name":"Second International Conference on Embedded Software and Systems (ICESS'05)","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123622370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 23
A virtual environment for collaborative assembly 协作装配的虚拟环境
Second International Conference on Embedded Software and Systems (ICESS'05) Pub Date : 2005-12-16 DOI: 10.1109/ICESS.2005.16
Xiaowu Chen, Nan Xu, Ying Li
{"title":"A virtual environment for collaborative assembly","authors":"Xiaowu Chen, Nan Xu, Ying Li","doi":"10.1109/ICESS.2005.16","DOIUrl":"https://doi.org/10.1109/ICESS.2005.16","url":null,"abstract":"To allow geographical dispersed engineers to perform an assembly task together, a virtual environment for collaborative assembly (VECA) has been developed to build a typical collaborative virtual assembly system. This presents the key parts of VECA, such as system architecture, HLA-based (high level architecture) communication and collaboration, motion guidance based on collision detection and assembly constraints recognition, data translation from CAD to virtual environment, reference resolution in multimodal interaction.","PeriodicalId":360757,"journal":{"name":"Second International Conference on Embedded Software and Systems (ICESS'05)","volume":"60 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114103616","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Supports for components loading and binding at boot-time for component-based embedded operating systems 支持基于组件的嵌入式操作系统在启动时加载和绑定组件
Second International Conference on Embedded Software and Systems (ICESS'05) Pub Date : 2005-12-16 DOI: 10.1109/ICESS.2005.88
Dong Xu, O. Teng, Xiangqun Chen
{"title":"Supports for components loading and binding at boot-time for component-based embedded operating systems","authors":"Dong Xu, O. Teng, Xiangqun Chen","doi":"10.1109/ICESS.2005.88","DOIUrl":"https://doi.org/10.1109/ICESS.2005.88","url":null,"abstract":"This paper presents the process of boot-time components loading and binding for TICK, a component-based embedded operating system targeted at resource-constrained devices. Based on the memory configuration information exported from the hardware abstraction layer, service components are loaded one-by-one through a configurable tunnel between the target and a hosting machine. Since the relocation information is provided in each self-contained component, the binding module in the component run-time establishes required connections among components. Interfacing members of all loaded components are resolved during the boot-time instead of during the link-time, thus different types of bindings between components can be implemented. Evaluation experiments show that the performance impacts induced are acceptable, while the infrastructure enables a flexible configuration of the target system.","PeriodicalId":360757,"journal":{"name":"Second International Conference on Embedded Software and Systems (ICESS'05)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126507368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Network storage system applied in the military field 网络存储系统在军事领域的应用
Second International Conference on Embedded Software and Systems (ICESS'05) Pub Date : 2005-12-16 DOI: 10.1109/ICESS.2005.71
L. Jia, Chenhui Li, Biaoyuan Li, Honghai Wang, D. Feng
{"title":"Network storage system applied in the military field","authors":"L. Jia, Chenhui Li, Biaoyuan Li, Honghai Wang, D. Feng","doi":"10.1109/ICESS.2005.71","DOIUrl":"https://doi.org/10.1109/ICESS.2005.71","url":null,"abstract":"With exponentially increasing information, the demand of the storage system becomes more and more largely. Network storage is a trend with high scalability, high reliability, and high performance. The network storage systems applied in U.S. army are analysed in the paper, and some opinions for the design of a storage system are presented.","PeriodicalId":360757,"journal":{"name":"Second International Conference on Embedded Software and Systems (ICESS'05)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125418984","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A block-level security based on hierarchical logical volume of fibre channel RAID 基于分层逻辑卷的光纤通道RAID的块级安全性
Second International Conference on Embedded Software and Systems (ICESS'05) Pub Date : 2005-12-16 DOI: 10.1109/ICESS.2005.1
K. Zhou, D. Feng, F. Wang, Zhan Shi
{"title":"A block-level security based on hierarchical logical volume of fibre channel RAID","authors":"K. Zhou, D. Feng, F. Wang, Zhan Shi","doi":"10.1109/ICESS.2005.1","DOIUrl":"https://doi.org/10.1109/ICESS.2005.1","url":null,"abstract":"Block-level security provides the lowest level security for storage devices. In this paper, we propose a block-level security based on hierarchical logical volume of FC RAID. Using the hierarchical logical volume, a group of physical disks can be mapped to a uniform logical storage space and two encrypt/decrypt algorithms can be applied to different logic volumes.","PeriodicalId":360757,"journal":{"name":"Second International Conference on Embedded Software and Systems (ICESS'05)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125728308","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Alphabet based selected character decoding for area efficient pattern matching architecture on FPGAs 基于字母表的区域高效模式匹配结构选择字符解码
Second International Conference on Embedded Software and Systems (ICESS'05) Pub Date : 2005-12-16 DOI: 10.1109/ICESS.2005.20
Tian Song, Wei Zhang, Zhizhong Tang, Dongsheng Wang
{"title":"Alphabet based selected character decoding for area efficient pattern matching architecture on FPGAs","authors":"Tian Song, Wei Zhang, Zhizhong Tang, Dongsheng Wang","doi":"10.1109/ICESS.2005.20","DOIUrl":"https://doi.org/10.1109/ICESS.2005.20","url":null,"abstract":"In this paper, we present an idea of selected character decoding (SCD) based on alphabet for network usage, especially network intrusion detection system (NIDS). SCD extends the approaches using decoder in order to achieve the least number of comparison units. The definitions of alphabet help to give the selections of characters for decoding, especially the alphabets of vertical left alignment (Avla). This paper also introduces a pattern matching architecture with alphabet based SCD. This architecture takes full advantages of the idea of pre-decoding and achieves the same high frequency as the one based on decoder while saving more than half resources. The third contribution of this paper is the idea and initial model for resource estimation just based on given pattern sets. To 1197 real patterns in Snort v2.3.3, experimental results show the resources used in alphabet based SCD is just 35.1% of the one in traditional 8-256 decoder. Targeting on Xilinx Virtex2Pro20 (speed grade 7), the pattern matching architecture can achieve 271 mHz, with 4.3Gbps throughput and can be scalable linearly.","PeriodicalId":360757,"journal":{"name":"Second International Conference on Embedded Software and Systems (ICESS'05)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122224473","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
The design and analysis of a high performance embedded external memory interface 高性能嵌入式外部存储器接口的设计与分析
Second International Conference on Embedded Software and Systems (ICESS'05) Pub Date : 2005-12-16 DOI: 10.1109/ICESS.2005.93
Dong Wang, Jianwu Ma, Shuming Chen, Yang Guo
{"title":"The design and analysis of a high performance embedded external memory interface","authors":"Dong Wang, Jianwu Ma, Shuming Chen, Yang Guo","doi":"10.1109/ICESS.2005.93","DOIUrl":"https://doi.org/10.1109/ICESS.2005.93","url":null,"abstract":"This paper introduces several important methods to design the embedded external memory interface (EMIF) for a high performance DSP (digital signal processor). Starting with the design specification of the EMIF, this paper introduces four important new design methods, i.e. width-scalable accessing, data buffers based on asynchronous FIFOs, token cycle method for priority arbitration, and preferential reading based on cache-line offset, and give simulation and tape out result. At the end of the paper, we analyze the performance improvements by use of these methods vs. classical methods. The whole design of the interface is proven to be not only functional and reliable, but also programmable, reusable and scalable by simulation verification and tape out.","PeriodicalId":360757,"journal":{"name":"Second International Conference on Embedded Software and Systems (ICESS'05)","volume":"75 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123158972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Authenticated public-key encryption based on elliptic curve 基于椭圆曲线的身份验证公钥加密
Second International Conference on Embedded Software and Systems (ICESS'05) Pub Date : 2005-12-16 DOI: 10.1109/ICESS.2005.34
Yiliang Han, Xiaoyuan Yang, Yu-pu Hu
{"title":"Authenticated public-key encryption based on elliptic curve","authors":"Yiliang Han, Xiaoyuan Yang, Yu-pu Hu","doi":"10.1109/ICESS.2005.34","DOIUrl":"https://doi.org/10.1109/ICESS.2005.34","url":null,"abstract":"An efficient scheme so called authenticated public key encryption that performs signature and encryption simultaneously is designed. The scheme is the first scheme that based on the standardized signature algorithm ECDSA and achieves both privacy and authenticity in the method of ECDLP which is the most practical cryptographic primitive in the future. The scheme saves 78%-82% computation costs in all. It also saves 14% storage costs for current security parameters and 9% storage costs for high level security in average. The saving is significant potentially, especially in power restricted applications such as embedded systems and mobile computing. Arguments show that the scheme is secure at present. Compared with RFC1421 and existed results, the scheme for multiple users also discussed.","PeriodicalId":360757,"journal":{"name":"Second International Conference on Embedded Software and Systems (ICESS'05)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134507736","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A reconfigurable RTOS with HW/SW co-scheduling for SOPC 面向SOPC的可重构软硬件协同调度RTOS
Second International Conference on Embedded Software and Systems (ICESS'05) Pub Date : 2005-12-16 DOI: 10.1109/ICESS.2005.9
Qingxu Deng, Shuisheng Wei, Hai Xu, Yu Han, Ge Yu
{"title":"A reconfigurable RTOS with HW/SW co-scheduling for SOPC","authors":"Qingxu Deng, Shuisheng Wei, Hai Xu, Yu Han, Ge Yu","doi":"10.1109/ICESS.2005.9","DOIUrl":"https://doi.org/10.1109/ICESS.2005.9","url":null,"abstract":"Emerging reconfigurable hardware, SOPC (system on programmable Chip), requires a RTOS to reuse the abundant source code. This paper presents a RTOS with the ability to co-schedule HW/SW, and discusses its architecture in detail for SOPC. The paper addresses an efficient run-time partitioning algorithm for block partitioning of FPGA. At last, a case study will be presented to validate our approach. The RTOS can decreases NRE costs and facilitates integrating hardware and software seamlessly.","PeriodicalId":360757,"journal":{"name":"Second International Conference on Embedded Software and Systems (ICESS'05)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114471352","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
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