{"title":"Parasitic Capacitance Optimization of GaAs HBT Class E Power Amplifier for High Efficiency CDMA EER Transmitter","authors":"Ki Young Kirn, J. H. Kim, Sung Min Park, C. Park","doi":"10.1109/RFIC.2007.380987","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380987","url":null,"abstract":"A class E power amplifier (PA) for a CDMA EER transmitter is implemented with GaAs HBT technology. This paper demonstrates an efficiency improvement with a parasitic capacitance compensation circuit. In order to obtain high output power, the PA needs the large emitter size of a main transistor. The larger the emitter size, the higher the parasitic capacitance should be. In particular, the parasitic CBE affects a distortion of the input voltage signal and decreases the PA's efficiency. Using the compensation circuit, we obtain 7% collector efficiency improvement at a similar output power level. This PA exhibits output power of 29 dBm and collector efficiency of 71% at 1.9 GHz.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"124 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116445690","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Cochlea-based Preselector for UWB Applications","authors":"C. Galbraith, Gabriel M. Rebeiz, R. Drangmeister","doi":"10.1109/RFIC.2007.380869","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380869","url":null,"abstract":"A compact, contiguous-channel multiplexer has been developed using a silicon multi-chip module (MCM) process. The passive channelizing filter is based on the mammalian cochlear response, covers 2-7 GHz in 15 channels (16% bandwidth) and occupies an area of 48 mm2. Such a filter finds application in integrated wideband and ultra-wideband (UWB) systems as a receiver preselector filter and/or a spectrum activity monitor.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133938391","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Scalable Lossy Substrate Model for Nanoscale RF MOSFET Noise Extraction and Simulation Adapted to Various Pad Structures","authors":"J. Guo, Y. Tsai","doi":"10.1109/RFIC.2007.380887","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380887","url":null,"abstract":"A broadband and scalable lossy substrate model is developed and validated for nanoscale RF MOSFETs of different finger numbers and adopting various pad structures such as lossy, normal, and small pads. The broadband accuracy is justified by good match with S-and Y-parameters up to 40 GHz. The measured noise characteristics in terms of four noise parameters can be accurately simulated up to 18 GHz. The scalable lossy substrate model can consistently predict the abnormally strong finger number dependence and nonlinear frequency response of noise figure (NFmin) revealed by the devices with lossy pads. Furthermore, the scalable model can precisely distribute the substrate loss between the transmission line (TML) and pads of various metal topologies and the resulted excess noises. The enhanced model provides useful guideline for appropriate layout of pads and TML to effectively reduce the excess noises. The remarkably suppressed noise figure to ideally intrinsic performance can be approached by the small pad in this paper.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133191996","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Shameli, A. Safarian, A. Rofougaran, M. Rofougaran, F. D. Flaviis, Broadcom Corporation
{"title":"An RFID System with Fully Integrated Transponder","authors":"A. Shameli, A. Safarian, A. Rofougaran, M. Rofougaran, F. D. Flaviis, Broadcom Corporation","doi":"10.1109/RFIC.2007.380884","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380884","url":null,"abstract":"This paper presents an RFID system with fully integrated transponder. The transmit path of the reader as well as key blocks of the tag is designed and fabricated in standard CMOS 0.18 mum process. The system operates at 900 MHz with the coverage range of more than 0.4 cm. The tag's antenna is integrated on chip without using any special process. The reader employs a coil switching technique to increase its coverage area. The PA in the transmit path of the reader is designed using digital to RF configuration. By employing a proper output network, the PA can deliver a current of 225 mA (RMS) to the reader's coil.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"245 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123757179","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Chen, C.K. Chen, P. Wyatt, J. Knecht, D. Yost, P. Gouker, P. Healey, C. Keast
{"title":"Fully Depleted SOI RF Switch with Dynamic Biasing","authors":"C. Chen, C.K. Chen, P. Wyatt, J. Knecht, D. Yost, P. Gouker, P. Healey, C. Keast","doi":"10.1109/RFIC.2007.380859","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380859","url":null,"abstract":"RF switches based on fully depleted (FD) SOI technology are reported for the first time. In a novel biasing circuit, the conventional bias resistor at the gate of the series MOSFET switch is replaced with another FET, which functions as a variable resistor and presents different resistance optimal for the on-and off-state. The low parasitic capacitance of FDSOI improved the switch performance and the dynamic biasing further increased the saturated power. At 5 GHz, a single-pole double-throw (SPDT) switch with integrated control circuits has 0.75-dB of insertion loss and 39-dB of isolation. The 1-dB-compression power of this dynamically biased SPDT switch approaches 2 W at 5 GHz.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122284392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A WiMAX Receiver with Variable Bandwidth of 2.5 - 20 MHz and 93 dB Dynamic Gain Range in 0.13-μm CMOS Process","authors":"Da-Rong Huang, Shiau-Wen Kao, Yi-Hsin Pang","doi":"10.1109/RFIC.2007.380903","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380903","url":null,"abstract":"A low-IF receiver for WiMAX applications has been designed and fabricated in TSMC 1P8M 0.13-μm CMOS process. It contains an on-chip single-ended low noise amplifier, balun, double-balanced mixers, and an analog baseband which consists of programmable gain amplifiers and a fifth-order Butterworth channel selection filter. The programmable gain amplifiers provide 0-65 dB gain range in ldB step and less than 0.4 dB gain error. The bandwidth of the channel selection filter is reconfigurable from 2.5 MHz to 20 MHz for different requirements in WiMAX applications. The receiver has 4.6 dB noise figure and consumes 50.4 mW with a 1.2 V power supply.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127172885","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
O. Lee, Kiseok Yang, K. An, Younsuk Kim, Hyungwook Kim, Jae J. Chang, W. Woo, Chang-Ho Lee, J. Laskar
{"title":"A 1.8-GHz 2-Watt Fully Integrated CMOS Push-Pull Parallel-Combined Power Amplifier Design","authors":"O. Lee, Kiseok Yang, K. An, Younsuk Kim, Hyungwook Kim, Jae J. Chang, W. Woo, Chang-Ho Lee, J. Laskar","doi":"10.1109/RFIC.2007.380918","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380918","url":null,"abstract":"This paper newly presents a push-pull parallel-combined CMOS power amplifier (PA) and its analysis of operation. The proposed class-E CMOS PA incorporates the push-pull parallel-combined power devices with the 1:1:2 (two single-turn primary windings and a two-turn secondary winding) step-up on-chip transformer. The PA is fully integrated in a standard 0.18-mum CMOS technology without any external balun or matching networks. The operation of the PA with a multi-turn on-chip transformer is substantially analyzed in order to optimize the device size and its structure. Experimental data demonstrates the output power of 2-watt and the power-added efficiency (PAE) of more than 30% with a 3.3-V of power supply at 1.8 GHz. This is the new demonstration of the compact fully integrated CMOS PA with 2-watt of output power with very stable operation at 1.8 GHz range.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128912514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Kiyota, C.-H. Chen, T. Kubodera, A. Nakamura, K. Takeshita, M. Deen
{"title":"A New Approach of High Frequency Noise Modeling for 70-nm NMOS Transistors by Accurate Noise Source Extraction","authors":"Y. Kiyota, C.-H. Chen, T. Kubodera, A. Nakamura, K. Takeshita, M. Deen","doi":"10.1109/RFIC.2007.380963","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380963","url":null,"abstract":"Noise sources of 70-nm NMOS transistors were extracted to reveal the channel noise is dominant up to 26 GHz. Gate induced noise increased in proportion to f2, however, its level was 1 to 2 orders of magnitude lower than the channel noise. A new approach to accurately capturing the behavior of thermal noise by compensating for the discrepancy between extracted and simulated channel noise through the addition of an excess noise source was demonstrated. The excess noise source was incorporated into our REMOS model, which enabled us to accurately simulate noise parameters. By using this technique the noise figure of MOS transistors at any source impedance values can be simulated correctly.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129215524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Tuned-Input Tuned-Output VCO in 0.18/spl mu/m CMOS","authors":"S. Shekhar, S. Aniruddhan, D. Allstot","doi":"10.1109/RFIC.2007.380957","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380957","url":null,"abstract":"A fully-integrated 2.3-2.7 GHz differential voltage-controlled oscillator derived from the classical tuned-input tuned-output (TITO) topology in 0.18 mum CMOS is presented. It uses an auxiliary resonant tank for additional noise suppression and achieves measured phase noise values of -110 dBc/Hz and -130.5 dBc/Hz at 100 kHz and 1 MHz frequency offsets, respectively. With a current consumption of 7.5 mA from a 1.8 V supply, it achieves a figure-of-merit of 187.2 dBc/Hz.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117127342","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
V. Karam, P. Popplewell, A. Shamim, J. Rogers, C. Plett
{"title":"A 6.3 GHz BFSK Transmitter with On-Chip Antenna for Self-Powered Medical Sensor Applications","authors":"V. Karam, P. Popplewell, A. Shamim, J. Rogers, C. Plett","doi":"10.1109/RFIC.2007.380842","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380842","url":null,"abstract":"This paper presents a completely integrated, low-power 6.3 GHz oscillator transmitter which includes an on-chip antenna suitable for short-range medical sensor applications. The transmitter, implemented in a 1.2 V 0.13 mum CMOS process, utilizes open-loop direct VCO modulation for BFSK data at a rate of 300 kbps. For communicating a 1 kbit packet once per second, an average power consumption of 14 muW is achieved. During a packet transmission, the power consumption of the transmitter is 4.25 mW, enabling a self-powered design using integrated ultracapacitors for an SoC solution. With a radiated power of 0 dBm, the transmitter has a communication range of 2 m.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132630316","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}