Jeng‐Han Tsai, Y. Cheng, Chuan-Chi Hung, Kun-Chan Chiang, Wei-Teung Li
{"title":"A 37–40 GHz power amplifier for 5G phased array applications using 0.1-μm GaAs pHEMT process","authors":"Jeng‐Han Tsai, Y. Cheng, Chuan-Chi Hung, Kun-Chan Chiang, Wei-Teung Li","doi":"10.1109/ICCE-Berlin.2017.8210597","DOIUrl":"https://doi.org/10.1109/ICCE-Berlin.2017.8210597","url":null,"abstract":"A 37–40 GHz power amplifier (PA) has been designed and fabricated on 0.1-μm GaAs pHEMT process. Utilizing two-way direct shunt power combining and low impedance transmission line pre-matching technique, the PA achieves measured saturation output power of 25.6 dBm with peak power added efficiency (PAE) of 28% at 38 GHz. The measured output 1-dB gain compression point is 24.6 dBm and the peak gain is 13.5 dB. The chip size is 2.03 × 1.03 mm2.","PeriodicalId":355536,"journal":{"name":"2017 IEEE 7th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123532107","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Radio over internet protocol transmission in optic based cable TV networks","authors":"Joonyoung Jung, Dong-Joon Choi, H. Kim","doi":"10.1109/ICCE-Berlin.2017.8210642","DOIUrl":"https://doi.org/10.1109/ICCE-Berlin.2017.8210642","url":null,"abstract":"This paper presents a method named RoIP (Radio over Internet Protocol) for converting an analog upstream radio frequency signal to a digitized signal and transmitting the digitized signal via an internet protocol in an optic based cable TV network. RoIP allows cable operators to begin installing PONs (Passive Optical Networks) today while keeping their investment in set-top-boxes, cable modems, and back-office systems.","PeriodicalId":355536,"journal":{"name":"2017 IEEE 7th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127632900","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Eleonora Nan, Una Radosavac, I. Papp, Marija Antic
{"title":"Architecture of voice control module for smart home automation cloud","authors":"Eleonora Nan, Una Radosavac, I. Papp, Marija Antic","doi":"10.1109/ICCE-Berlin.2017.8210601","DOIUrl":"https://doi.org/10.1109/ICCE-Berlin.2017.8210601","url":null,"abstract":"This paper presents one implementation of the voice control module within the smart home automation cloud. The implemented voice control module can process the textual result of arbitrary speech-to-text conversion engine, to detect patterns corresponding to the device names and desired actions. Based on the detected command semantics, control messages for smart home automation cloud are generated, which result in the desired action within the home automation system. The proposed voice control module is implemented within the existing home automation cloud, and its performance is tested.","PeriodicalId":355536,"journal":{"name":"2017 IEEE 7th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130524087","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Prist, E. Pallotta, A. Monteriù, S. Longhi, P. Cicconi, A. C. Russo, M. Germani
{"title":"Modelling and hardware-in-the-loop simulation for energy management in induction cooktops","authors":"M. Prist, E. Pallotta, A. Monteriù, S. Longhi, P. Cicconi, A. C. Russo, M. Germani","doi":"10.1109/ICCE-Berlin.2017.8210641","DOIUrl":"https://doi.org/10.1109/ICCE-Berlin.2017.8210641","url":null,"abstract":"Induction cooktops are very efficient systems, but, their energy consumption should be reduced using a temperature controller for optimizing the electrical power. Such controllers are already widely spread in several applications (air conditioning, ovens, etc.). Induction cooktops work with discrete levels of power, and, therefore, the user can select and modify the requested power level during the cooking. This paper presents the Hardware-In-the-Loop simulation to develop an active temperature controller, which optimizes the energy management of the water boiling using an induction cooktop. A thermal and induction model has been developed in MATLAB/Simulink® framework, while a discrete PID controller has been implemented inside a physical ATMEGA processor and tested within the Hardware-In-the-Loop platform.","PeriodicalId":355536,"journal":{"name":"2017 IEEE 7th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123377806","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nemanja Nikic, M. Herceg, V. Pekovic, Nenad Soskic
{"title":"System for DASH support verification in HbbTV environment","authors":"Nemanja Nikic, M. Herceg, V. Pekovic, Nenad Soskic","doi":"10.1109/ICCE-Berlin.2017.8210630","DOIUrl":"https://doi.org/10.1109/ICCE-Berlin.2017.8210630","url":null,"abstract":"Due to the diversity in todays communication networks, adaptability is one of the key requirements in development of a quality multimedia streaming client. In this paper, a system for verification of Hybrid Broadcast Broadband TV (HbbTV) standard, with special emphasis on the Moving Picture Experts Group Dynamic Adaptive Streaming over Hypertext Transfer Protocol (MPEG-DASH) functionality, is given. System functionality was tested by using a developed JavaScript DASH player, which structure is described in this paper. The player was developed to verify the adequate. DASH content support, by using HbbTV application programming interface (API), in accordance with the testing rules defined by HbbTV.","PeriodicalId":355536,"journal":{"name":"2017 IEEE 7th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121028588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Enhanced AODV based-on home sensors power","authors":"H. Abusaimeh","doi":"10.1109/ICCE-Berlin.2017.8210614","DOIUrl":"https://doi.org/10.1109/ICCE-Berlin.2017.8210614","url":null,"abstract":"Most home sensor devices nowadays is based on low data rate and on-demand routing protocol such as Ad hoc On-demand Distance Vector (AODV). This routing protocol has less overhead and good efficiency in term of delivery ratio and bandwidth. AODV has two phases the route discover phase which discover route to the destination devices based on the shortest and the freshest hop, and the data delivery phase which I have improved it to make power aware in [1]. Therefore, the enhancement on the AODV in this paper to make the discovering phase considering the power of the devices in addition to the other factors. This new enhancement makes the AODV consider the power level of the home sensor devices in finding the optimal path to the destination device. The highest home sensor power route will be selected with the shortest and freshest routes with giving the priority to the power of the devices. The enhanced AODV has better performance on the lifetime of the home sensor devices by increasing their lifetimes with 25%.","PeriodicalId":355536,"journal":{"name":"2017 IEEE 7th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129650322","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Aleksandar Cumbo, N. Pjevalica, Bosko Kragulj, N. Teslic
{"title":"Real time video recording architecture of the ADAS algorithm verification system","authors":"Aleksandar Cumbo, N. Pjevalica, Bosko Kragulj, N. Teslic","doi":"10.1109/ICCE-Berlin.2017.8210605","DOIUrl":"https://doi.org/10.1109/ICCE-Berlin.2017.8210605","url":null,"abstract":"In this paper example of architecture system for examination existing devices for visual perception of the environment in Advanced Driver Assistance Systems is analyzed and presented. An overview of modern testing techniques as well as the motivation for such a device development arises from the specific testing conditions, increased volume of testing embedded software and applied algorithms as well as from the high standardized demands for functional safety engineered devices.","PeriodicalId":355536,"journal":{"name":"2017 IEEE 7th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127026235","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Eric, Sandra Ivanovic, Suncica Milivojsa, Milica Matic, N. Smiljkovic
{"title":"Voice control for smart home automation: Evaluation of approaches and possible architectures","authors":"T. Eric, Sandra Ivanovic, Suncica Milivojsa, Milica Matic, N. Smiljkovic","doi":"10.1109/ICCE-Berlin.2017.8210613","DOIUrl":"https://doi.org/10.1109/ICCE-Berlin.2017.8210613","url":null,"abstract":"In this paper, we explore the possibility of using existing voice recognition tools, in order to add the voice control interface to the existing smart home automation system. The choice of the voice recognition engine influences the architecture of the voice command interface, and determines its performance. We discuss the possible architectures of the voice enabled smart home automation systems. Then, we present the overview of available speech to text and text to speech engines, and analyze the possibilities of using them within our system.","PeriodicalId":355536,"journal":{"name":"2017 IEEE 7th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129462392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Julian Hartig, G. P. Vayá, Henrik Heymann, H. Blume
{"title":"Tool-supported design space exploration of a processor system for SIFT-feature detection","authors":"Julian Hartig, G. P. Vayá, Henrik Heymann, H. Blume","doi":"10.1109/ICCE-Berlin.2017.8210619","DOIUrl":"https://doi.org/10.1109/ICCE-Berlin.2017.8210619","url":null,"abstract":"This paper presents a tool-supported flow for exploring the design space of an FPGA-based application, which is the Scale-Invariant Feature Transform (SIFT), a common image feature detection algorithm used as key component in computer vision tasks such as advanced driver assistance systems (ADAS). The proposed system is based on a dedicated hardware accelerator tightly coupled to a soft-core VLIW processor. Starting with a parameterizable implementation and measurements taken in emulation, empirical models of the design space are created. After that, an optimization algorithm identifies optimal design alternatives as basis for trade-off analysis.","PeriodicalId":355536,"journal":{"name":"2017 IEEE 7th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)","volume":"11 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126054635","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A deep learning convolution architecture for simple embedded applications","authors":"Chan Kim, Yong Cheol Peter Cho, Youngsu Kwon","doi":"10.1109/ICCE-Berlin.2017.8210595","DOIUrl":"https://doi.org/10.1109/ICCE-Berlin.2017.8210595","url":null,"abstract":"A simple AXI based convolution architecture for deep learning is presented. Input feature maps and kernel weights are stored in P K∗K memory blocks and convolution is done from output feature map 0 to M-1, and inside a feature map, output is generated in raster scan order. Data from P input feature maps are summed in parallel during convolution. It is possible to provide P K∗K input feature map data, P K∗K weights and the bias for the input and output feature maps being processed by manipulating the read addresses and read data alignment. Dual buffers are used to perform convolution for output feature map while DMA write for previous final output feature map is in progress. Correct operation was verified by comparing RTL simulation and C program run results. This method provides over 2,000 speed-up compared to pure software method and with flow control between DMA and convolution, much less memory can be used. This architecture can be used for convolution acceleration for moderate deep learning applications on embedded systems.","PeriodicalId":355536,"journal":{"name":"2017 IEEE 7th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131221005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}