Tool-supported design space exploration of a processor system for SIFT-feature detection

This paper presents a tool-supported flow for exploring the design space of an FPGA-based application, which is the Scale-Invariant Feature Transform (SIFT), a common image feature detection algorithm used as key component in computer vision tasks such as advanced driver assistance systems (ADAS). The proposed system is based on a dedicated hardware accelerator tightly coupled to a soft-core VLIW processor. Starting with a parameterizable implementation and measurements taken in emulation, empirical models of the design space are created. After that, an optimization algorithm identifies optimal design alternatives as basis for trade-off analysis.