2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA)最新文献_第2页

NVM aware MariaDB database system 支持NVM的MariaDB数据库系统

2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA) Pub Date : 2015-10-29 DOI: 10.1109/NVMSA.2015.7304362

Jan Lindström, Dhananjoy Das, Torben Mathiasen, D. Arteaga, Nisha Talagala

{"title":"NVM aware MariaDB database system","authors":"Jan Lindström, Dhananjoy Das, Torben Mathiasen, D. Arteaga, Nisha Talagala","doi":"10.1109/NVMSA.2015.7304362","DOIUrl":"https://doi.org/10.1109/NVMSA.2015.7304362","url":null,"abstract":"MariaDB is a community-developed fork of the MySQL relational database management system and originally designed and implemented to use traditional spinning disk architecture. Now that devices with Non-Volatile memory (NVM) technologies are available, MariaDB addresses this challenge by adding support for NVM devices and introduces NVM Compression method. NVM Compression is a novel hybrid technique that combines application level compression with flash awareness for optimal performance and storage efficiency. Utilizing new interface primitives exported by Flash Translation Layers (FTLs), we leverage the garbage collection available in flash devices to optimize the capacity management required by compression systems. We implement NVM Compression in the popular MariaDB database and use variants of commonly available POSIX file system interfaces to provide the extended FTL capabilities to the user space application. The experimental results show that the hybrid approach of NVM Compression can improve compression performance by 2-7x, deliver compression performance for flash devices that is within 5% of uncompressed performance, improves storage efficiency by 19% over legacy Row-Compression, reduce data writes by up to 4x when combined with other flash aware techniques such as Atomic Writes, and deliver further advantages in power efficiency and CPU utilization.","PeriodicalId":353528,"journal":{"name":"2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133800728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Design exploration of inrush current aware controller for nonvolatile processor 非易失性处理器浪涌电流感知控制器的设计探索

2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA) Pub Date : 2015-10-29 DOI: 10.1109/NVMSA.2015.7304357

Yongpan Liu, Fang Su, Zhibo Wang, Huazhong Yang

引用次数: 15

Flashdefibrillator: a data recovery technique for retention failures in NAND flash memory 闪光除颤器:一种用于NAND闪存保留故障的数据恢复技术

2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA) Pub Date : 2015-10-29 DOI: 10.1109/NVMSA.2015.7304359

Jaeyong Jeong, Youngsun Song, Jihong Kim

{"title":"Flashdefibrillator: a data recovery technique for retention failures in NAND flash memory","authors":"Jaeyong Jeong, Youngsun Song, Jihong Kim","doi":"10.1109/NVMSA.2015.7304359","DOIUrl":"https://doi.org/10.1109/NVMSA.2015.7304359","url":null,"abstract":"Although NAND flash memory is known as a nonvolatile memory device, the non-volatility of the data stored in the NAND flash memory is guaranteed only for a specified retention time. Since the NAND retention time assumes specific operation conditions, when the NAND flash memory is exposed to an abnormal environment beyond the specified operation conditions, stored data cannot be reliably retrieved due to retention failures. In this paper, we propose a novel data recovery technique, called FlashDefibrillator (FD), for recovering retention failures in recent NAND flash memory. By reversely exploiting charge-transient behavior observed in recent 20-nm node (or below) NAND flash memory, FD can identify retention-failed cells in a progressive fashion using a novel selective error-correction procedure. FD repeatedly applies the selective error-correction procedure until retention failures are fully recovered. Our measurement results with recent 20-nm node NAND chips show that FD outperforms the existing recovery technique in both the data recovery speed and the data recovery capability. FD can recover retention failures up to 23 times faster over the existing data recovery technique. Furthermore, FD can successfully recover severely retention-failed data (such as ones experienced eight times longer retention times than the retention-time specification) which were not recoverable with the existing technique.","PeriodicalId":353528,"journal":{"name":"2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132997635","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

Exploring data placement in racetrack memory based scratchpad memory 探索基于刮板存储器的赛马场存储器中的数据放置

2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA) Pub Date : 2015-10-29 DOI: 10.1109/NVMSA.2015.7304358

Haiyu Mao, Chao Zhang, Guangyu Sun, J. Shu

引用次数: 26

Workload-aware budget compensation scheduling for NVMe solid state drives NVMe固态硬盘的工作负载感知预算补偿调度

2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA) Pub Date : 2015-10-29 DOI: 10.1109/NVMSA.2015.7304369

Byung-Geun Jun, Dongkun Shin

{"title":"Workload-aware budget compensation scheduling for NVMe solid state drives","authors":"Byung-Geun Jun, Dongkun Shin","doi":"10.1109/NVMSA.2015.7304369","DOIUrl":"https://doi.org/10.1109/NVMSA.2015.7304369","url":null,"abstract":"Recently, solid state drives (SSDs) are replacing hard disk drives (HDDs) in datacenter storage systems in order to reduce power consumption and improve I/O performance. Additionally, in order to mitigate the performance bottleneck at I/O interface between host and SSD, the PCIe-leveraging NVMe SSD is emerging for data center SSDs. The NVMe interface supports the I/O virtualization mechanism called single root I/O virtualization (SR-IOV), which is a device self-virtualization technique for supporting direct paths from virtual machines (VMs) to I/O devices. Multiple virtual machines can share an SR-IOV-supporting physical device without intervention of virtual machine monitor. SR-IOV-supporting SSD should provide a device-level scheduler which can schedule the requests from multiple VMs considering performance isolation and fairness. In this paper, we propose a workload-aware budget compensation scheduling algorithm for the device-level request scheduler. To guarantee the performance isolation, the device-level scheduler estimates the contribution on the garbage collection (GC) cost of each virtual machine in the SSD device. Based on the estimated GC contributions, the budget of each VM is compensated for performance isolation. We experimented the effects of the proposed technique with an SSD simulator. The experiments showed that the scheduler can guarantee the performance isolation when multiple VMs share an NVMe SSD with different workloads.","PeriodicalId":353528,"journal":{"name":"2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA)","volume":"176 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127813268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 26

A buffer cache architecture for smartphones with hybrid DRAM/PCM memory 一种用于混合DRAM/PCM存储器的智能手机的缓冲缓存架构

2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA) Pub Date : 2015-10-29 DOI: 10.1109/NVMSA.2015.7304363

Ye-Jyun Lin, Chia-Lin Yang, Hsiang-Pang Li, Cheng-Yuan Michael Wang

引用次数: 14

Improving MLC PCM write throughput by write reconstruction 通过写重构提高MLC PCM的写吞吐量

2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA) Pub Date : 2015-10-29 DOI: 10.1109/NVMSA.2015.7304373

Huizhang Luo, Liang Shi, Mengying Zhao, Qingfeng Zhuge, C. Xue

引用次数: 5

STT-MRAM cell design with partial source line planes: improving the trade-off between area and series resistance 具有部分源线平面的STT-MRAM单元设计:改善面积电阻和串联电阻之间的权衡

2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA) Pub Date : 2015-10-29 DOI: 10.1109/NVMSA.2015.7304355

R. Appeltans, S. Cosemans, P. Raghavan, D. Verkest, L. Perre, W. Dehaene

引用次数: 4

Designing an efficient persistent in-memory file system 设计一个高效的持久内存文件系统

2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA) Pub Date : 2015-08-01 DOI: 10.1109/NVMSA.2015.7304365

E. Sha, Xianzhang Chen, Qingfeng Zhuge, Liang Shi, Weiwen Jiang

{"title":"Designing an efficient persistent in-memory file system","authors":"E. Sha, Xianzhang Chen, Qingfeng Zhuge, Liang Shi, Weiwen Jiang","doi":"10.1109/NVMSA.2015.7304365","DOIUrl":"https://doi.org/10.1109/NVMSA.2015.7304365","url":null,"abstract":"As the emerging technologies of persistent memory, such as MRAM, PCM, etc., provide opportunities for connecting persistent memory to main memory bus directly, file system structure needs re-studying and re-designing. This paper presents a new design of persistent, in-memory file system for computers systems employing persistent memory. We introduce a novel design framework based on the concept that each file has its own “File Virtual Address Space”. Following this idea, address mapping of file data access can be efficiently handled by address translation hardware. The new design pushes the boundary of persistent, in-memory file system to such an extent that software layers in I/O stack are bypassed. File data can be read continuously without interrupt or traversing metadata structure. The proposed file system, called Sustainable In-Memory File System (SIMFS), is implemented in Linux. Extensive experiments have been conducted, showing that the throughput of SIMFS approaches the memory bus bandwidth in best cases. Comparing with other in-memory file systems, SIMFS reaches 50-80 times, 5 times, and 1.1-1.6 times faster than PRAMFS, EXT4 on Ramdisk, and PMFS, respectively. To the authors' knowledge, SIMFS gives the best known results in literature.","PeriodicalId":353528,"journal":{"name":"2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114498015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 20