2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems最新文献_第6页

Design of CMOS Millimeter-Wave Cross-Coupled LC Quadrature VCOs with Varactorless Frequency Tuning 无变容管频率调谐的CMOS毫米波交叉耦合LC正交压控振荡器设计

2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2008-02-01 DOI: 10.1109/SMIC.2008.16

I.R. Chamas, S. Raman

引用次数: 4

Current Status and Future Trends for Si and Compound MMICs in Millimeter-Wave Regime and Related Issues for System on Chip (SOC) and/or System in Package (SIP) Applications 毫米波下硅和化合物mmic的现状和未来趋势以及片上系统(SOC)和/或封装系统(SIP)应用的相关问题

2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2008-02-01 DOI: 10.1109/SMIC.2008.12

Huei Wang

{"title":"Current Status and Future Trends for Si and Compound MMICs in Millimeter-Wave Regime and Related Issues for System on Chip (SOC) and/or System in Package (SIP) Applications","authors":"Huei Wang","doi":"10.1109/SMIC.2008.12","DOIUrl":"https://doi.org/10.1109/SMIC.2008.12","url":null,"abstract":"Summary form only given. The anticipated presentation will cover the current status and future trends of millimeter-wave MMICs, including those using III-V compound (GaAs, InP, GaN, etc.) and Si-based (CMOS, SiGe HBT and BiCMOS) MMIC technologies. Millimeter-wave MMICs used to be applied to military and astronomy systems for long time and started to be utilized for civil applications in the decade, such as communications and automotive radars. The evolution of IC technologies has enabled the performance of Si-based MMICs over 100 GHz, even in standard bulk CMOS processes. This is believed to have a major impact in the future development of millimeter-wave systems. Since low-cost mass-production potential pushes forward the technology, a very high integration of circuit functions on a chip, such as RF, base-band circuitry, automatic-control for a steady operation, and maybe even the antenna, etc. should be included, and thus the system on chip (SOC) issues should be addressed, especially in MMW regime. Moreover, millimeter-wave packaging cost always dominated in the module development In order to simplify the assembly and reduced cost, the concept of system in package (SIP) has been proposed. This presentation will also survey the current technologies for SOC and SIP and discuss related issues and challenges.","PeriodicalId":350325,"journal":{"name":"2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114760528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Dynamic Optical Characterization of NEMS Resonators NEMS谐振器的动态光学特性

2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2008-02-01 DOI: 10.1109/SMIC.2008.33

L. Coudron, F. Casset, C. Durand, P. Renaux, E. Oilier, D. Bloch, P. Vairac

引用次数: 0

A 9.2 mW, 4-8 GHz Resistive Feedback CMOS LNA with 24.4 dB Gain, 2 dB Noise Figure, and 21.5 dBm Output IP3 9.2 mW, 4- 8ghz阻性反馈CMOS LNA，增益24.4 dB，噪声系数2db，输出IP3为21.5 dBm

2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2008-02-01 DOI: 10.1109/SMIC.2008.15

B. Perumana, J. Zhan, S. S. Taylor, B. Carlton, J. Laskar

引用次数: 11

Notice of Violation of IEEE Publication PrinciplesA Dual Channel DVB-S/S2 Direct-Conversion Satellite TV Tuner with On-Chip ADCs and Multiple DC Offset Cancellation Loops 一种带有片上adc和多个直流偏置抵消环路的双通道DVB-S/S2直接转换卫星电视调谐器

2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2008-02-01 DOI: 10.1109/SMIC.2008.8

A. Maxim, C. Turinici, M. Gheorge

{"title":"Notice of Violation of IEEE Publication PrinciplesA Dual Channel DVB-S/S2 Direct-Conversion Satellite TV Tuner with On-Chip ADCs and Multiple DC Offset Cancellation Loops","authors":"A. Maxim, C. Turinici, M. Gheorge","doi":"10.1109/SMIC.2008.8","DOIUrl":"https://doi.org/10.1109/SMIC.2008.8","url":null,"abstract":"This paper proposes a dual channel satellite TV receiver using an alternative partition into a front-end RF-todigital tuner that includes the baseband ADC converters and a digital-only demodulator-on-host, resulting in a low cost and a good isolation between the analog front-end and the digital backend. The die area was significantly reduced by replacing the multi-oscillator solution used at present with a single high frequency Colpitts oscillator, followed by a ratiometric frequency divider that generates the local oscillator signals for the entire satellite TV L-band. VCO pulling was reduced by having a larger frequency offset between the two PLLs, while the ADC spurs were avoided by performing a dynamic clock frequency management. The DC offset cancellation loop capacitors were integrated onchip by combining a multiple loop architecture with Miller capacitance multiplication. Tuner specifications include: -85dBm sensitivity, <7dB noise figure, +26dBm IIP3 at minimum gain,<0.7° total integrated phase noise, 24mm2 die area and 2W power from a 3.3V supply in dual channel reception mode.","PeriodicalId":350325,"journal":{"name":"2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127757893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Finite Element Simulations of Parasitic Capacitances Related to Multiple-Gate Field-Effect Transistors Architectures 多栅极场效应晶体管结构寄生电容的有限元模拟

2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2008-02-01 DOI: 10.1109/SMIC.2008.52

O. Moldovan, D. Lederer, B. Iñíguez, J. Raskin

引用次数: 6