M. Besacier, J. Schanen, J. Roudet, P. Suau, J. Crebier
{"title":"PSPICE-compatible electrical equivalent circuit for busbars","authors":"M. Besacier, J. Schanen, J. Roudet, P. Suau, J. Crebier","doi":"10.1109/APEC.2000.822603","DOIUrl":"https://doi.org/10.1109/APEC.2000.822603","url":null,"abstract":"The paper shows that it is possible to provide a PSPICE-compatible electrical equivalent scheme to represent the electrical behaviour of busbars. First a modeling method is proposed. Then it is shown how to get the equivalent circuit. This method is applied to an industrial busbar, which can be represented with a simple PSPICE macro-component. Experimental validation is given in time and frequency domain.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129308841","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Speed sensorless control of induction motor considering the flux saturation","authors":"Jung-Soo Choi, Wang-Moon Kim, Young-Seok Kim","doi":"10.1109/APEC.2000.826098","DOIUrl":"https://doi.org/10.1109/APEC.2000.826098","url":null,"abstract":"When the air-gap flux of an induction motor is saturated, the conventional adaptive speed estimator cannot avoid the influence of the nonlinear inductance variation. In this paper, the authors propose a novel speed estimator having a hybrid architecture in order to estimate both the rotor speed and the inductance variation simultaneously. The proposed estimator consists of an error between the flux derived from the stator voltage equation and the flux estimated from the rotor flux observer. Introducing the correction term into the estimator increases the estimation ability of the conventional speed estimator even though the motor flux is saturated. The error convergence of the proposed speed estimator is examined by performing the simulation. Furthermore, the experimental results show the validity of the proposed method.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"1998 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125711278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"New start-up schemes for isolated full-bridge boost converters","authors":"Lizhi Zhu, Kunrong Wang, F. C. Lee, J. Lai","doi":"10.1109/APEC.2000.826120","DOIUrl":"https://doi.org/10.1109/APEC.2000.826120","url":null,"abstract":"Two new start-up schemes for isolated full-bridge boost converters are proposed in this paper. The control timing for each scheme, which is compatible with the PWM control timing for the normal boost mode operation, is investigated. Design considerations on the relationships between the turns ratios of the boost choke windings and the main transformer windings, and its effects on the operation of the converter, are studied. The two proposed start-up schemes are experimentally verified on a 1.6 kW, 12 V/288 V prototype.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125949119","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Ripple effects on small signal models in average current mode control","authors":"Chunxiao Sun, B. Lehman, J. Sun","doi":"10.1109/APEC.2000.822599","DOIUrl":"https://doi.org/10.1109/APEC.2000.822599","url":null,"abstract":"The effects of switching frequency ripple on the behavior of average current mode PWM DC/DC converters are studied. Ripple estimation and superposition methods are applied to derive new frequency-dependent averaged models that take into account these effects. Small-signal analysis of the new model reveals several important characteristics of average current mode control, especially under large ripple conditions, that previous models were unable to predict. Discussions on the small-signal models for PWM DC/DC converters are demonstrated.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130128963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A design approach for server power supplies for networking applications","authors":"L. Huber, M. Jovanovic","doi":"10.1109/APEC.2000.822834","DOIUrl":"https://doi.org/10.1109/APEC.2000.822834","url":null,"abstract":"Present specifications for computer power supplies for networking applications call for designs with dual inputs: the universal AC-line input and the 48-V nominal DC input. In this paper, a design and evaluation of the DC-input version of a 900-W server power supply is presented. The AC-input version of this power supply is leveraged from the AC-input version by using the same output stage, and by replacing the AC front-end in the AC-input version with a DC front end which provides the same input voltage to the output stage. By adopting this design approach, it is possible to achieve design modularity, design standardization, minimize the design time, optimize utilization of resources, and minimize the cost. The DC-input version uses a cascade connection of two DC boost converters because of its superior performance compared with other topologies.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130231357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Marketing lessons learned from a Complementary Power Industry 2000 IEEE Applied Power Electronics Conference (APEC 2000)","authors":"Barry Papermaster","doi":"10.1109/APEC.2000.826085","DOIUrl":"https://doi.org/10.1109/APEC.2000.826085","url":null,"abstract":"Appropriate marketing tools and techniques can provide dramatic and measurable success in achieving selling objectives. Actual case studies drawn from the UPS (uninterruptible power supply) industry illustrate the use of the marketing principles, including customer analysis, results analysis and planning, measurable and meaningful goals, cost/result quantification and creativity. The case studies include direct mail, electronic marketing, trade show marketing and distributor marketing campaigns.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131516160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new space vector based control method for UPS systems powering nonlinear and unbalanced loads","authors":"U. Jensen, P. Enjeti, F. Blaabjerg","doi":"10.1109/APEC.2000.822611","DOIUrl":"https://doi.org/10.1109/APEC.2000.822611","url":null,"abstract":"In this paper a new real time space vector based control strategy is presented for 3-phase UPS systems powering nonlinear and unbalanced loads. The proposed control strategy generates the inverter reference and gating signals in closed loop and guarantees high quality output voltages at the load terminals. The approach, which is implemented on a DSP, adapts to a wide variation of nonlinear and unbalanced load conditions without specific knowledge of output filter (LC) component values. Analysis and experimental results on a 10 kVA system are presented. The results show that the output voltage is restored at heavy nonlinear and unbalanced load.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129387083","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Two methods to drive synchronous rectifiers during dead time in forward topologies","authors":"Xie Xuefei, J.C.P. Liu, F. Poon, B. Pong","doi":"10.1109/APEC.2000.822810","DOIUrl":"https://doi.org/10.1109/APEC.2000.822810","url":null,"abstract":"Conventional self-driven synchronous rectification forward topology cannot provide drive voltage for freewheeling synchronous rectifier (SR) when transformer magnetic reset process is over and zero voltage appears across the transformer windings. This causes SR body diode turn on and deteriorates the performance of synchronous rectification. In this paper, two SR drive mechanisms, gate charge retention drive and energy recovery current drive are presented. Both mechanisms can solve this body diode turn on problem. The current driven method also provides constant drive voltage and allows parallel operation. Two 250 kHz, 48 V input 5 V/10 A output DC-DC modules are designed using these two methods. 92% efficiency is achieved at full load for both modules.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130863192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A step-down converter with low ripple input current for power factor correction","authors":"V. Grigore, J. Kyyra","doi":"10.1109/APEC.2000.826104","DOIUrl":"https://doi.org/10.1109/APEC.2000.826104","url":null,"abstract":"Step-down converters can be used to achieve power factor correction when a low output voltage is desired. The paper analyzes a nonisolated, two-inductor, step-down power converter and presents its application to power factor correction, when operating in the continuous conduction mode with average current mode control. The input current of the converter is continuous, since one of the inductors is on the line side. Moreover, for a proper coupling of the two inductors, the ripple of the input current can be significantly reduced. Thus, a PFC preregulator with low output voltage and low-ripple input current is obtained. The paper also presents experimental results for a 48 VDC output-voltage and 200 W output-power power factor correction preregulator, operating with 230 VRMS input voltage.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131030241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Fernández, J. Sebastian, P. Alou, J. Cobos, M. Rascon
{"title":"Low output voltage AC/DC converter with a new scheme of synchronous rectification that complies with IEC 1000-3-2 regulations","authors":"A. Fernández, J. Sebastian, P. Alou, J. Cobos, M. Rascon","doi":"10.1109/APEC.2000.822579","DOIUrl":"https://doi.org/10.1109/APEC.2000.822579","url":null,"abstract":"In order to obtain low output voltages with a high efficiency, synchronous rectification is mandatory. When the output voltage is low, it is very difficult to use self-driven synchronous rectification and additional windings are used to properly drive the MOSFETs. Moreover, IEC 1000-3-2 regulations impose low input current harmonic contents for power levels higher than 75 W. A recently proposed synchronous rectification scheme is combined with a modified input current shaper to design a 100 W, 3.3 V AC/DC converter that complies with IEC 1000-3-2 regulations.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"124 23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132431217","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}