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APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)最新文献

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Unified constant-frequency integration control of active power filters 有源电力滤波器的统一恒频积分控制
APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058) Pub Date : 2000-08-31 DOI: 10.1109/APEC.2000.826135
Luowei Zhou, K. Smedley
{"title":"Unified constant-frequency integration control of active power filters","authors":"Luowei Zhou, K. Smedley","doi":"10.1109/APEC.2000.826135","DOIUrl":"https://doi.org/10.1109/APEC.2000.826135","url":null,"abstract":"An active power filter (APF) is a device that is connected in parallel to and cancels the reactive and harmonic currents from a group of nonlinear loads so that the resulting total current drawn from the AC mains is sinusoidal. This paper presents a unified constant-frequency integration (UCI) APF control method based on one-cycle control. This method employs an integrator with reset as its core component to control the pulse width of an AC-DC converter so that its current draw is precisely opposite to the reactive and harmonic current draw of the nonlinear loads. In contrast to previously proposed methods, there is no need to generate a current reference for the control of the converter current, thus no need for a multiplier and no need to sense the AC line voltage, the APF current, or the nonlinear load current. Only one current sensor and one voltage sensor are used to sense the AC main current and the DC capacitor voltage. The control method features carrier free, constant switching frequency operation, minimum reactive and harmonic current generation, and simple analog circuitry. It provides a low cost and high performance solution for power quality control. Detailed analysis and design were conducted using a two-level AC-DC boost topology. A prototype was developed to demonstrate the performance of the proposed APF. This control method is generalized to control a family of converters that are suitable for APF applications. All findings are supported by experiments and simulation.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128584261","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 60
Thyristor controlled two-stage magnetic-valve reactor for dynamic VAr-compensation in electric railway power supply systems 可控硅控制两级磁阀电抗器在电气化铁路供电系统中的动态补偿
APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058) Pub Date : 2000-02-06 DOI: 10.1109/APEC.2000.822820
Baichao Chen, J. Kokernak
{"title":"Thyristor controlled two-stage magnetic-valve reactor for dynamic VAr-compensation in electric railway power supply systems","authors":"Baichao Chen, J. Kokernak","doi":"10.1109/APEC.2000.822820","DOIUrl":"https://doi.org/10.1109/APEC.2000.822820","url":null,"abstract":"The electrification of railway systems is becoming more prevalent throughout the world. The implementation of adjustable speed drives in conjunction with the mobile nature of the trains presents a case where harmonic content varies with time and location along the power supply. Advanced systems implement power factor correction on the rail car system. Existing systems require expensive conversions to accomplish this. A variable saturable reactor is presented here that provides a more economical approach to add power factor correction to existing rail systems. The system includes structure modifications to limit hysteresis and skin effect losses. A 27.5 kV, 2400 kVA system is constructed and tested to confirm the operation of the system.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114983469","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 29
A novel wide range pulse width overmodulation method [for voltage source inverters] 一种新型宽范围脉宽过调制方法[用于电压源逆变器]
APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058) Pub Date : 2000-02-06 DOI: 10.1109/APEC.2000.826158
A. Díaz, E. Strangas
{"title":"A novel wide range pulse width overmodulation method [for voltage source inverters]","authors":"A. Díaz, E. Strangas","doi":"10.1109/APEC.2000.826158","DOIUrl":"https://doi.org/10.1109/APEC.2000.826158","url":null,"abstract":"A new method for PWM in the over-modulation range is proposed. The range of the method, called mode III, covers the range previously covered by modes I and II. It allows extending the maximum modulation index in SVM from 0.906 to 1 where six-step mode is reached. The new method shows a very good linearity and is simpler to apply than the space vector modulation scheme and the voltage reference scheme. A description of the method, its implementation, and simulation and experimental results are presented and discussed.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123114182","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
An interleaved single-stage power-factor-correction electronic ballast 交错单级功率因数校正电子镇流器
APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058) Pub Date : 2000-02-06 DOI: 10.1109/APEC.2000.826167
F. Tao, F. Lee
{"title":"An interleaved single-stage power-factor-correction electronic ballast","authors":"F. Tao, F. Lee","doi":"10.1109/APEC.2000.826167","DOIUrl":"https://doi.org/10.1109/APEC.2000.826167","url":null,"abstract":"An interleaved single-stage power-factor-correction (PFC) electronic ballast is presented in this paper. The proposed ballast is combined by two interleaved boost cells and a conventional half bridge DC/AC inverter. Each boost cell operates in discontinuous conduction mode so that a high power factor is achieved naturally. By exploiting the interleaving technique, the input ripple current of the electronic ballast is reduced. Theoretical analysis and experimental results for two 45-watt fluorescent lamps are presented.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127146299","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
Evaluation of a novel single-stage high-power-factor electronic ballast based on integrated buck half-bridge resonant inverter 基于集成降压半桥谐振逆变器的新型单级高功率因数电子镇流器的评价
APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058) Pub Date : 2000-02-06 DOI: 10.1109/APEC.2000.826166
J. Alonso, A. Calleja, J. Ribas, E. Corominas, M. Rico-Secades
{"title":"Evaluation of a novel single-stage high-power-factor electronic ballast based on integrated buck half-bridge resonant inverter","authors":"J. Alonso, A. Calleja, J. Ribas, E. Corominas, M. Rico-Secades","doi":"10.1109/APEC.2000.826166","DOIUrl":"https://doi.org/10.1109/APEC.2000.826166","url":null,"abstract":"A novel single-stage high-power-factor electronic ballast obtained from the integration of a buck DC-to-DC converter and a half-bridge resonant inverter is evaluated in this paper. The buck converter is operated in discontinuous conduction mode and at constant frequency providing an input power factor high enough to satisfy present standard requirements. The operation of the proposed ballast is also investigated in detail in this paper. A ballast prototype for two 36 W fluorescent lamps has been both simulated and implemented at the laboratory.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127214992","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
A precisely regulated multiple output forward converter topology 一种精确调节的多输出正向变换器拓扑结构
APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058) Pub Date : 2000-02-06 DOI: 10.1109/APEC.2000.822809
Y. Xi, Praveen Jain, Yanfei Liu
{"title":"A precisely regulated multiple output forward converter topology","authors":"Y. Xi, Praveen Jain, Yanfei Liu","doi":"10.1109/APEC.2000.822809","DOIUrl":"https://doi.org/10.1109/APEC.2000.822809","url":null,"abstract":"A precisely regulated multiple output forward converter topology is presented in this paper. In this topology, each output voltage is directly and independently regulated by its own feedback control circuit that controls the appropriate synchronous rectifiers in the pertinent output stage, while the main switch is feedforward controlled. Thus, there is no cross regulation between the outputs, and design of each output becomes straightforward. Steady state analysis is performed to understand the topology and to provide design guidance. A prototype circuit with two outputs is built, and experiment are carried out on this prototype and the results verify the concepts and design.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124877794","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Evaluation of metal post interconnected parallel plate structure for power electronic building blocks 电力电子构件用金属柱互联平行板结构的评价
APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058) Pub Date : 2000-02-06 DOI: 10.1109/APEC.2000.826115
Kalyan Siddabattula, Zhou Chen, D. Boroyevich
{"title":"Evaluation of metal post interconnected parallel plate structure for power electronic building blocks","authors":"Kalyan Siddabattula, Zhou Chen, D. Boroyevich","doi":"10.1109/APEC.2000.826115","DOIUrl":"https://doi.org/10.1109/APEC.2000.826115","url":null,"abstract":"This paper evaluates metal post interconnected parallel plate structure (MPIPPS) adopted for the power electronic building blocks (PEBB) packaging program in terms of parasitic elements involved in the layout design, current distribution and its impact on electrical performance. It also compares this technology with the more conventional wire-bond technology. Electrical performance predicted by INCA, Maxwell, and PSPICE is verified with an experimental setup.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124901240","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
A closed-loop selective harmonic compensation for active filters 有源滤波器的闭环选择性谐波补偿
APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058) Pub Date : 2000-02-06 DOI: 10.1109/APEC.2000.826134
P. Mattavelli, S. Fasolo
{"title":"A closed-loop selective harmonic compensation for active filters","authors":"P. Mattavelli, S. Fasolo","doi":"10.1109/APEC.2000.826134","DOIUrl":"https://doi.org/10.1109/APEC.2000.826134","url":null,"abstract":"This paper proposes a control algorithm for parallel active power filters, based on current-controlled PWM converters, which allows precise compensation of selected harmonic currents produced by distorting loads. The approach is based on the measurement of line currents and performs the compensation of the selected harmonics using closed-loop synchronous frame controllers. Because of the closed-loop operation, full compensation of the desired harmonics is achieved even in the presence of a significant delay in the VSI current control. Because of the selective approach, active filter interactions with a possible dynamic component of the load are minimized. The complexity of the synchronous frame controllers are avoided using equivalent stationary frame controllers with the same dynamic performance. Experimental results of a converter prototype confirm the theoretical expectations.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126047070","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 496
Unified averaged switch models for stability analysis of large distributed power systems 大型分布式电力系统稳定性分析的统一平均开关模型
APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058) Pub Date : 2000-02-06 DOI: 10.1109/APEC.2000.826112
Jian Sun
{"title":"Unified averaged switch models for stability analysis of large distributed power systems","authors":"Jian Sun","doi":"10.1109/APEC.2000.826112","DOIUrl":"https://doi.org/10.1109/APEC.2000.826112","url":null,"abstract":"Unified averaged switch models for PWM converters are presented. The models are applicable for both continuous and discontinuous conduction modes. They have been implemented in SABER and are intended for stability analysis of large distributed power systems. In addition to their simplicity and improved accuracy over existing models, the new models are also capable of providing inductor ripple information. This makes it possible to implement peak current limiting and other protection functions, which is important for large-signal stability analysis of distributed power systems, but has not been possible with existing averaged models. Simulation results from both a DC/DC and a power factor corrected AC/DC converters are presented to validate the accuracy of the models and to demonstrate the robustness of the implementation, especially under abnormal operation conditions.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121848661","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 46
Three-phase AC/DC regulated power supplies: a comparative evaluation of different topologies 三相交流/直流稳压电源:不同拓扑结构的比较评估
APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058) Pub Date : 2000-02-06 DOI: 10.1109/APEC.2000.826152
B.N. Singh, P. Jain, G. Joós
{"title":"Three-phase AC/DC regulated power supplies: a comparative evaluation of different topologies","authors":"B.N. Singh, P. Jain, G. Joós","doi":"10.1109/APEC.2000.826152","DOIUrl":"https://doi.org/10.1109/APEC.2000.826152","url":null,"abstract":"This paper deals with a comparative evaluation of AC-DC power supplies with 220 V, three-phase AC input and 48 V DC output in 10 kVA power range. These are widely used AC-DC converters in many applications, particularly telecommunication systems. These converters can be categorized into three groups, first topologies based on single-phase switched mode rectifier and PWM semi-boost rectifier, second, topologies based on PWM current source rectifier and third, topologies based on PWM voltage source rectifier. Comparative evaluation includes number of active and passive components, number of control loops and complexity of control system, number of sensors, requirement of output stage isolation and performance of all the converters at input/output ports. Standard software for simulation for power electronics circuits provides steady state and transient performance of these converters. The size of all the active and passive components is set to meet the standard criteria for performance. The experimental verification of simulated results is carried out.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117245791","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
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