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A stacked split word-line (SSW) cell for low-voltage operation, large capacity, high speed SRAMs 一种用于低压操作、大容量、高速sram的堆叠分割字线(SSW)单元
Proceedings of IEEE International Electron Devices Meeting Pub Date : 1993-12-05 DOI: 10.1109/IEDM.1993.347276
S. Ikeda, K. Asayama, N. Hashimoto, E. Fujita, Y. Yoshida, A. Koike, T. Yamanaka, K. Ishibashi, S. Meguro
{"title":"A stacked split word-line (SSW) cell for low-voltage operation, large capacity, high speed SRAMs","authors":"S. Ikeda, K. Asayama, N. Hashimoto, E. Fujita, Y. Yoshida, A. Koike, T. Yamanaka, K. Ishibashi, S. Meguro","doi":"10.1109/IEDM.1993.347276","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347276","url":null,"abstract":"Stacked Split Word-Line cell technology suitable for low voltage operation, large capacity and high speed SRAMs has been proposed. Two pull-down transistors and two access transistors are fabricated employing two separate gate formations. A pair of split word-lines is stacked over pull-down transistors. That permits large cell ratio in small cell area and independent optimization of pull-down and access transistors. Threshold voltage of access transistors is lowered to improve cell stability. Top gate thin film polysilicon transistor and Vcc plate are used to make cell node capacitor and improve soft error immunity. This technology is applied to a fast 16M bit SRAM and enabled a 7.16 /spl mu/m/sup 2/ cell area in relaxed 0.4 /spl mu/m layout rule utilizing conventional i-line stepper without phase-shift masks.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132614090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Impact of arsenic deactivation in polycrystalline silicon and at polysilicon-monosilicon interfaces on contact resistance 多晶硅和多晶硅-单晶硅界面处砷失活对接触电阻的影响
Proceedings of IEEE International Electron Devices Meeting Pub Date : 1993-12-05 DOI: 10.1109/IEDM.1993.347270
A. Perera, W. Taylor, M. Orlowski
{"title":"Impact of arsenic deactivation in polycrystalline silicon and at polysilicon-monosilicon interfaces on contact resistance","authors":"A. Perera, W. Taylor, M. Orlowski","doi":"10.1109/IEDM.1993.347270","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347270","url":null,"abstract":"Arsenic deactivation in polycrystalline silicon, and in devices incorporating polysilicon in a 4 M SRAM BiCMOS process has been studied. The effects of anneal conditions and material characteristics (grain size and interfacial oxide) on sheet and contact resistance data, and npn bipolar characteristics, shows that arsenic deactivation in polysilicon and at poly/mono-silicon interfaces is a partially reversible process. Our data indicates that appropriate rapid thermal anneals can significantly reduce contact resistance (39%) and improve device performance by reactivating arsenic at the poly/mono-silicon interface.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131084458","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
An ultra low power lateral bipolar polysilicon emitter technology on SOI 基于SOI的超低功率横向双极多晶硅发射极技术
Proceedings of IEEE International Electron Devices Meeting Pub Date : 1993-12-05 DOI: 10.1109/IEDM.1993.347395
Ronald Dekker, W.T.A. van der Einden, H. Maas
{"title":"An ultra low power lateral bipolar polysilicon emitter technology on SOI","authors":"Ronald Dekker, W.T.A. van der Einden, H. Maas","doi":"10.1109/IEDM.1993.347395","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347395","url":null,"abstract":"Until now the lateral bipolar transistor on SOI has been presented as an option in a CMOS process. In this investigation we show that this device structure is also very attractive for purely bipolar applications, enabling high frequency operation at ultra low power levels. Excellent devices with emitter areas down to 0.15 /spl mu/m/sup 2/, with scaled junction capacitances and f/sub T/ as high as 15 GHz are demonstrated. Due to the properly scaled junction capacitances a f/sub max/ of 15 GHz is realised at collector currents as low as 15 /spl mu/A.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128869144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 28
High-frequency modulation of a QW diode laser by dual modal gain and pumping current control 双模增益和抽运电流控制对QW二极管激光器的高频调制
Proceedings of IEEE International Electron Devices Meeting Pub Date : 1993-12-05 DOI: 10.1109/IEDM.1993.347246
V. Gorfinkel, G. Kompa, M. Novotný, S. A. Gurevich, G. Shtengel, I. E. Chebunina
{"title":"High-frequency modulation of a QW diode laser by dual modal gain and pumping current control","authors":"V. Gorfinkel, G. Kompa, M. Novotný, S. A. Gurevich, G. Shtengel, I. E. Chebunina","doi":"10.1109/IEDM.1993.347246","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347246","url":null,"abstract":"A novel dual modulation technique is proposed and realized for a new four terminal QW diode laser structure. The simultaneous output modulation by modal gain and pumping current density (G&J) control was investigated experimentally. Applying a step-like electric signal with a 20 ps rise-time to the side contacts resulted in the laser switching-off time of the same value. The dynamic laser parameters were extracted from RF measurements, and simulation of the laser response to the dual G&J modulation was carried out. A 3dB bandwidth as broad as 60 GHz has been obtained at moderate laser output powers. In millimeterwave region the laser output response decays as 1spl omega/.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128906337","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A 0.5 /spl mu/m CMOS technology for multifunctional applications with embedded FN-flash memory and linear R and C modules 0.5 /spl mu/m CMOS技术，用于嵌入式fn闪存和线性R和C模块的多功能应用
Proceedings of IEEE International Electron Devices Meeting Pub Date : 1993-12-05 DOI: 10.1109/IEDM.1993.347314
R. Heinrich, W. Heinrigs, G. Tempel, J. Winnerl, T. Zettler
{"title":"A 0.5 /spl mu/m CMOS technology for multifunctional applications with embedded FN-flash memory and linear R and C modules","authors":"R. Heinrich, W. Heinrigs, G. Tempel, J. Winnerl, T. Zettler","doi":"10.1109/IEDM.1993.347314","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347314","url":null,"abstract":"A 0.5 /spl mu/m CMOS technology was developed for multifunctional applications. Based on a high performance logic process for 3.3 V supply voltage a non volatile memory module and highly linear resistors and capacitors were implemented. The flash memory is programmed and erased by Fowler-Nordheim (FN) tunneling. The extremely low power consumption of the FN cell allows the in system programming with a single 3.3 V supply, which is especially important in portable systems. Bit programming and erasing times are typically 1 ms and 100 /spl mu/s, respectively. With page mode (128 bit) programming times of 10 /spl mu/s per bit are achieved. The endurance is better than 10/sup 5/ cycles.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133806800","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Device characteristics of 0.1 /spl mu/m MOSFET with RONO (reoxidized nitrided oxide) gate dielectrics 0.1 /spl mu/m具有RONO(再氧化氮化氧化物)栅极电介质的MOSFET器件特性
Proceedings of IEEE International Electron Devices Meeting Pub Date : 1993-12-05 DOI: 10.1109/IEDM.1993.347248
Y. Egawa, H. Inoue, H. Yasuda, Y. Suzuki, S. Iwasa, A. Kawasaki
{"title":"Device characteristics of 0.1 /spl mu/m MOSFET with RONO (reoxidized nitrided oxide) gate dielectrics","authors":"Y. Egawa, H. Inoue, H. Yasuda, Y. Suzuki, S. Iwasa, A. Kawasaki","doi":"10.1109/IEDM.1993.347248","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347248","url":null,"abstract":"In this paper, we report for the first time on the mobility and reliability characteristics in 0.1 /spl mu/m gate MOSFET with RONO as gate dielectrics. The nand p-channel LDD FETs used in this study were fabricated on 6-inch (100) p-type silicon wafers.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"190 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124219553","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Nanoelectronic devices: opportunities and challenges 纳米电子器件:机遇与挑战
Proceedings of IEEE International Electron Devices Meeting Pub Date : 1993-12-05 DOI: 10.1109/IEDM.1993.347411
D. Kern
{"title":"Nanoelectronic devices: opportunities and challenges","authors":"D. Kern","doi":"10.1109/IEDM.1993.347411","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347411","url":null,"abstract":"Progress in scaling of semiconductor devices has enabled the exponential growth in complexity and functionality of integrated circuits over the past decades. Limits to this development originating from device physics, circuit architecture, but also from materials, processes and possibly economics become apparent. The work on confined electron systems conducted over the past ten years exhibiting quantum interference, quantum size, quantum resonant tunneling and Coulomb blockade effects may well lead to new ways to further increase integrated circuit functionality, if appropriate architectures and solutions to the fabrication problems can be found. Novel switching effects based on motion of single atoms in tunneling configurations, molecular conduction and arrangements possibly combined with self assembly and biological materials represent even more potential alternatives. The paper will discuss key issues associated with different approaches.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"59 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124320898","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Species, dose and energy dependence of implant induced transient enhanced diffusion 植入物诱导瞬时增强扩散的种类、剂量和能量依赖性
Proceedings of IEEE International Electron Devices Meeting Pub Date : 1993-12-05 DOI: 10.1109/IEDM.1993.347349
P. Griffin, R. Lever, R. Huang, H. Kennel, P. Packan, J. Plummer
{"title":"Species, dose and energy dependence of implant induced transient enhanced diffusion","authors":"P. Griffin, R. Lever, R. Huang, H. Kennel, P. Packan, J. Plummer","doi":"10.1109/IEDM.1993.347349","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347349","url":null,"abstract":"Special test structures which separate implant damage from a buried monitor boron layer were used to observe the transient diffusion associated with implant annealing. The large anomalous diffusion length is independent of implant species but strongly dependent on implant energy. This is modeled by enhanced Frenkel pair recombination along dense cascade damage tracks associated with heavier ions. The enhancement in the buried layer diffusion also depends on the concentration of the buried layer, even below the intrinsic electron concentration. We propose that boron clusters formed by high populations of mobile boron are necessary in order to model transient diffusion effects.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"278 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114398354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Electrical and thermal modeling of a gated field emission triode 门控场发射三极管的电学和热建模
Proceedings of IEEE International Electron Devices Meeting Pub Date : 1993-12-05 DOI: 10.1109/IEDM.1993.347201
T. Su, C.L. Lee, J.C.-M. Huang
{"title":"Electrical and thermal modeling of a gated field emission triode","authors":"T. Su, C.L. Lee, J.C.-M. Huang","doi":"10.1109/IEDM.1993.347201","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347201","url":null,"abstract":"A rather complete numerical simulation program for electrical and thermal characteristics of a two-dimensional gated field emission triode is presented. Important aspect such as space charge effect, Joule heating, Nottingham effect as well as thermally-dependent heat conductivity and electrical resistivity are included. Computation accuracy and efficiency is established via a automatically adjusted mesh structure. Good matches with published measured data are observed. New insight over triode on-set voltages and thermal stabilized tip structure are suggested.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116966253","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
SOI for a 1-volt CMOS technology and application to a 512 Kb SRAM with 3.5 ns access time SOI用于1伏CMOS技术，并应用于具有3.5 ns访问时间的512 Kb SRAM
Proceedings of IEEE International Electron Devices Meeting Pub Date : 1993-12-05 DOI: 10.1109/IEDM.1993.347275
G. Shahidi, T. Ning, T. Chappell, J. Comfort, B. Chappell, R. Franch, C. Anderson, P. Cook, S. Schuster, M. Rosenfield, M. Polcari, R. Dennard, B. Davari
{"title":"SOI for a 1-volt CMOS technology and application to a 512 Kb SRAM with 3.5 ns access time","authors":"G. Shahidi, T. Ning, T. Chappell, J. Comfort, B. Chappell, R. Franch, C. Anderson, P. Cook, S. Schuster, M. Rosenfield, M. Polcari, R. Dennard, B. Davari","doi":"10.1109/IEDM.1993.347275","DOIUrl":"https://doi.org/10.1109/IEDM.1993.347275","url":null,"abstract":"In this paper a CMOS technology that is optimum for low voltage (in the I-volt range) applications is presented. Thin but undepleted SOI is used as the substrate, which gives low junction capacitance and no body effect. Furthermore floating body effects causes a reduction of subthreshold slope at high drain bias. This lowers the high-V/sub DS/ threshold to be used, which increases the current drive without significant increase in the off-current. This technology was applied to a high performance 512 Kb SRAM. Access time of 3.5 ns at 1 V was obtained.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"2003 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125777765","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 31
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