发布求助
文献互助 智能选刊 最新文献

2020 European Conference on Circuit Theory and Design (ECCTD)最新文献

筛选
英文 中文
Stability and Transient Dynamics of PLLs in Theory and Experiments 锁相环的稳定性和瞬态动力学理论与实验
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218377
R. Riaz, D. Prousalis, C. Hoyer, J. Wagner, F. Ellinger, F. Jülicher, L. Wetzel
{"title":"Stability and Transient Dynamics of PLLs in Theory and Experiments","authors":"R. Riaz, D. Prousalis, C. Hoyer, J. Wagner, F. Ellinger, F. Jülicher, L. Wetzel","doi":"10.1109/ECCTD49232.2020.9218377","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218377","url":null,"abstract":"This paper presents a generalization of the classical phase-locked loop (PLL) theory. It includes the effects of time-delays and mutual coupling between PLLs. Two methods for finding stable solutions to locked states and their transient dynamics are discussed. The theoretical predictions of these methods are verified by experimental measurements obtained of a classical PLL entrained by a clock. For entrainment the generalized and classical PLL theory overlap. The analysis correctly predicts the phase-relations of phase-locked states, the loop-gain dependency on the component characteristics and time-delays and the transient dynamics, i.e., perturbation decay rate and the frequency of perturbation decay. Thus the generalized theory allows a deeper understanding of a PLL’s response. The model covers PLLs of arbitrary order and number of inputs.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"123 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127044619","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A novel analysis of the beam squinting in wideband phased array digital I/Q transmitters 宽带相控阵数字I/Q发射机波束偏斜的新分析
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218366
Veselin Manev, M. Neofytou, G. Radulov, K. Doris
{"title":"A novel analysis of the beam squinting in wideband phased array digital I/Q transmitters","authors":"Veselin Manev, M. Neofytou, G. Radulov, K. Doris","doi":"10.1109/ECCTD49232.2020.9218366","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218366","url":null,"abstract":"This paper investigates the beam squint of direct conversion phased array transmitters with quadrature modulation and digital beam-forming. Beam squint occurs due to frequency dependent beam forming and leads to signal deterioration. It is analyzed in terms of EVM and maximum bit-rate, using both analytical and numerical computation. Various results illustrate the dependencies of the error mechanism on key design parameters in mm-wave transmitters. It is shown that having 14 elements and 120° scanning angle limits the theoretical maximum bitrate by 84% We show that using partial symbol delay in baseband, the EVM can be improved up to -30dB for 10 elements and more, without any apparent disadvantages. Moreover the bitrate theoretical maximum is increased by 4 times.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115032402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Synchronisation in Noisy PLL Networks: Time Domain Model and its Analysis 噪声锁相环网络的同步:时域模型及其分析
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218440
Eugene Koskin, M. Balakin, N. Ryskin, D. Galayko, E. Blokhina
{"title":"Synchronisation in Noisy PLL Networks: Time Domain Model and its Analysis","authors":"Eugene Koskin, M. Balakin, N. Ryskin, D. Galayko, E. Blokhina","doi":"10.1109/ECCTD49232.2020.9218440","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218440","url":null,"abstract":"In this paper we consider a PLL network described by an array of interconnected noisy phase oscillators. We define optimal conditions where the entire array synchronises with the reference signal by interacting only between nearest neighbours. We develop a continuous-time model of the PLL network and analyse synchronisation of the system numerically for different architectures of coupling and variations of control parameters. We show that the bidirectional topology significantly outperforms the unidirectional topology in terms of the overall phase noise of the network.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116744221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Equivalent Transmission Lines for Quantum Particles in Sectionally Constant Potentials 部分恒电位下量子粒子的等效传输线
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218407
P. Civalleri, F. Corinto
{"title":"Equivalent Transmission Lines for Quantum Particles in Sectionally Constant Potentials","authors":"P. Civalleri, F. Corinto","doi":"10.1109/ECCTD49232.2020.9218407","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218407","url":null,"abstract":"The motion of a nonrelativistic spinless quantum particle moving on a straight line under a sequence of constant potentials is modeled by a cascade of generalized transmission lines. The equivalence between physical quantities of the system and electrical quantities of the model is illustrated. The equivalent circuit can be used for simulation and as an help to understand quantum properties.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121566410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
General Chairs Message 主席总致辞
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ecctd49232.2020.9218423
{"title":"General Chairs Message","authors":"","doi":"10.1109/ecctd49232.2020.9218423","DOIUrl":"https://doi.org/10.1109/ecctd49232.2020.9218423","url":null,"abstract":"","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124010958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
On the Integration of Physically Unclonable Functions into ARM TrustZone Security Technology 物理不可克隆功能集成到ARM TrustZone安全技术的研究
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218417
Callum Aitchison, Roman Buckle, Alvin Ch’ng, Christian Clarke, Jacob Malley, Basel Halak
{"title":"On the Integration of Physically Unclonable Functions into ARM TrustZone Security Technology","authors":"Callum Aitchison, Roman Buckle, Alvin Ch’ng, Christian Clarke, Jacob Malley, Basel Halak","doi":"10.1109/ECCTD49232.2020.9218417","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218417","url":null,"abstract":"As Internet of Things (IoT) devices are increasingly used in industry and become further integrated into our daily lives the security of such devices is of paramount concern. Ensuring that the large amount of information that these devices collect is protected and only accessible to authenticated users is a critical requirement of the industry. One potentially inexpensive way to improve device security utilises a Physically Unclonable Function (PUF) to generate a unique random response per device. This random response can be generated in such a way that it can be regenerated reliably and repeatably allowing the response to be considered a signature for each device. This signature could then be used for authentication or key generation purposes, improving trust in IoT devices. The advantage of a PUF based system is that the response does not need to be stored in nonvolatile memory as it is regenerated on demand, hardening the system against physical attacks. With SoC FPGAs being inexpensive and widely available there is potential for their use in both industrial and consumer applications as an additional layer of hardware security. In this paper we investigate and implement a Trusted Execution Environment (TEE) based around a PUF solely implemented in the FPGA fabric on a Xilinx Zynq-7000 SoC FPGA. The PUF response is used to seed a generic entropy maximisation function or Pseudorandom Number Generator (PRNG) with a system controller capable of encrypting data to be useful only to the device. This system interacts with a software platform running in the ARM TrustZone on the ARM Cortex core in the SoC, which handles requests between user programs and the FPGA. The proposed PUF-based security module can generate unique random keys able to pass all NIST tests and protects against physical attacks on buses and nonvolatile memories. These improvements are achieved at a cost of fewer than half the resources on the Zynq-7000 SoC FPGA.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132946267","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A startup circuit for even-stage differential ring oscillators 一种用于偶级差动环振荡器的启动电路
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218335
L. Benvenuti, P. Bruschi, L. Fanucci, A. Maccioni, G. Pasetti, F. Tinfena
{"title":"A startup circuit for even-stage differential ring oscillators","authors":"L. Benvenuti, P. Bruschi, L. Fanucci, A. Maccioni, G. Pasetti, F. Tinfena","doi":"10.1109/ECCTD49232.2020.9218335","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218335","url":null,"abstract":"If not properly initiated, even-stage ring oscillators may resonate in undesirable ways. When this occurs, their output frequency can be higher than expected and they can no longer be employed as VCOs in PLL designs. In this paper, we analyze this issue and then we propose a novel startup circuit that can be used in differential, even-stage ring oscillators. This design is produced using a 0.30 µm CMOS process. Measurements performed on test chips show that our circuit always prevents spurious oscillation modes from arising. On the contrary, if the proper startup is disabled, unwanted modes may occur, especially at low temperatures or with little bias current. Moreover, consisting of just two MOSFETs per oscillator stage, the proposed circuit is also very simple and efficient in terms of area and power dissipation.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131876060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
SPICE and MATLAB simulation and evaluation of Electrical Impedance Tomography readout chain using phantom equivalents SPICE和MATLAB模拟和评估电阻抗断层扫描读出链使用幻像等效
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218384
Christos Dimas, Vassilis Alimisis, P. Sotiriadis
{"title":"SPICE and MATLAB simulation and evaluation of Electrical Impedance Tomography readout chain using phantom equivalents","authors":"Christos Dimas, Vassilis Alimisis, P. Sotiriadis","doi":"10.1109/ECCTD49232.2020.9218384","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218384","url":null,"abstract":"Electrical Impedance Tomography (EIT) is an imaging technique which has gained popularity in both the medical and industrial process fields. A small amplitude sinusoidal current is utilized, while potential measurements are collected from an electrode array, attached to an object’s surface and used for generating a map of its relative conductivity distribution. In this study, an extensive simulation methodology is presented. It uses cylindrical phantom multiport equivalent passive circuits and focuses on analog and digital readout parameters such as the measuring pattern, the ADC sampling rates, the total periods utilized for each measurement as well as the thermal, flicker and quantization noise effects. The EIT analog circuitry, merged with the subject multiport equivalent is simulated in SPICE, while the digital part is simulated in MATLAB. The presented simulation procedure can assist on specifying important EIT design and measuring parameters, such as the required ADC characteristics, minimum noise and number of periods for averaging. It can also be used in the evaluation of image reconstruction approaches and noise robustness testing.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"120 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123230478","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Direct state transfer in MLC based memristive ReRAM devices for ternary computing 基于MLC的三元计算记忆存储器的直接状态转移
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218323
D. Fey, J. Reuben
{"title":"Direct state transfer in MLC based memristive ReRAM devices for ternary computing","authors":"D. Fey, J. Reuben","doi":"10.1109/ECCTD49232.2020.9218323","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218323","url":null,"abstract":"In this paper we present a new procedure for a direct state transfer in ReRAM based multi-level cell (MLC) memristors for future ternary data processing, i.e. the direct transitioning of one ternary MLC state to another state. According to the rules of a ternary stored-transfer-adder cell the content of two memristors storing three different resistance values are read out and processed by a sense amplifier to produce a new ternary state for two output memristors. In contrast to own older work the analogue-digital-converting of ternary MLC based memristors with subsequent digital processing is avoided what requires a comparatively high energy budget. The solution is based on an adapted version of an existing sense amplifier circuit realising an in-memory processing for a majority logic developed by our own. We present the new concept and simulation results characterising the functionality for the new memristive ternary MLC for a ReRAM technology from Innovations for High Performance Microelectronics (IHP).","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123642041","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Instruction Extension of an Open Source RV32IMC Core for NTRU Cryptosystem NTRU密码系统的开源RV32IMC内核指令扩展
2020 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2020-09-01 DOI: 10.1109/ECCTD49232.2020.9218372
Elif Nur İşman, Canberk Topal, Latif Akçay, S. Yalcin
{"title":"Instruction Extension of an Open Source RV32IMC Core for NTRU Cryptosystem","authors":"Elif Nur İşman, Canberk Topal, Latif Akçay, S. Yalcin","doi":"10.1109/ECCTD49232.2020.9218372","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218372","url":null,"abstract":"Post-quantum cryptography is one of the popular research topics today. The implementation of the proposed algorithms is also extremely important. In this study, the NTRU cryptosystem, which is one of the post-quantum cryptography candidate algorithms, is designed and run on an open source RV32IMC processor. New instruction candidates have been developed and integrated into the functional unit of the processor with a functional profiling method. The results show that NTRU cryptosystem can be accelerated by 32.3% with this simple method.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122432541","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信