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2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE)最新文献

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Design and analysis of a novel, compact, multi band-notched, super wideband antenna applicable for Wireless Personal Area Networks 一种新型、紧凑、多带陷波、超宽带无线个人区域网络天线的设计与分析
2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE) Pub Date : 2019-03-01 DOI: 10.1109/ICSPVCE46182.2019.9092862
B. Roy, A. Bhattacharya, A. De, A. Roy, A. Bhattacharjee
{"title":"Design and analysis of a novel, compact, multi band-notched, super wideband antenna applicable for Wireless Personal Area Networks","authors":"B. Roy, A. Bhattacharya, A. De, A. Roy, A. Bhattacharjee","doi":"10.1109/ICSPVCE46182.2019.9092862","DOIUrl":"https://doi.org/10.1109/ICSPVCE46182.2019.9092862","url":null,"abstract":"A Super Wideband (SWB), compact sized, coplanar waveguide fed monopole antenna having dual-band notch feature has been investigated in this paper. The antenna exhibits an extremely wide impedance-bandwidth of 33.12 GHz (01.19 GHz – 34.31 GHz) and an equivalent fractional bandwidth of 186.59 %. The antenna proposed here, shows dual band-notch features at WiMAX (03.3 GHz - 03.7 GHz) and WLAN (05.15 GHz – 05.85 GHz) bands. The band rejection characteristics, for the WLAN band centered at 05.5 GHz has been obtained by introducing a Split Ring Rectangular Resonating Structure (SRRRS) at the lower section of the elliptical radiator. A Defected Spiral Microstrip Structure (DSMS) has been introduced in the feed line segment for obtaining a second band-notch for the WiMAX band centered at 03.5 GHz. The dimension of the whole structure is $W x L = 20 times 22 mathrm{mm}^{2} = 0.079 lambda_{mathrm{o}} times 0.087 lambda_{mathrm{o}} mathrm{mm}^{2}$. The proposed antenna is applicable for Wireless Personal Area Network (WPAN) based communications.","PeriodicalId":335856,"journal":{"name":"2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125722335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Design Approach for Bandgap Reference Circuit 一种带隙参考电路的设计方法
2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE) Pub Date : 2019-03-01 DOI: 10.1109/ICSPVCE46182.2019.9092822
J. Kaur, R. Kaushik, A. Srivastava, Sakshi Singh
{"title":"A Design Approach for Bandgap Reference Circuit","authors":"J. Kaur, R. Kaushik, A. Srivastava, Sakshi Singh","doi":"10.1109/ICSPVCE46182.2019.9092822","DOIUrl":"https://doi.org/10.1109/ICSPVCE46182.2019.9092822","url":null,"abstract":"The paper presents a systematic approach of designing a bandgap reference circuit using 2-stage operational amplifier. The circuit is designed using 0.18 µm CMOS process. In simulation we achieve a reference of 789 mV with a coefficient of temperature 71.69 ppm/ºC for the temperature range 104°C at 1.8 V supply voltage. The reference voltage circuit consumed 60.82 µW of power. The layout with DRC and LVS check of the BGR core was completed. The overall area of the designed BGR circuit is 0.027 mm2.","PeriodicalId":335856,"journal":{"name":"2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131563891","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Robust Controller Design and Performance Analysis of Four-Tank Coupled System 四缸耦合系统鲁棒控制器设计及性能分析
2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE) Pub Date : 2019-03-01 DOI: 10.1109/ICSPVCE46182.2019.9092789
Rituraj Kashyap, N. Jaggi, B. Pratap
{"title":"Robust Controller Design and Performance Analysis of Four-Tank Coupled System","authors":"Rituraj Kashyap, N. Jaggi, B. Pratap","doi":"10.1109/ICSPVCE46182.2019.9092789","DOIUrl":"https://doi.org/10.1109/ICSPVCE46182.2019.9092789","url":null,"abstract":"This paper is focussed on the robust controller design and performance analysis of four tank coupled system (FTCS). The FTCS is a nonlinear system with multiple-input-multiple-output (MIMO) having significant coupled dynamics. The problem of liquid level control for FTCS is considered to achieve the desired set point. First, the nonlinear model of FTCS has been linearized and levels of the tanks are controlled using three different linear control strategies. Further, a robust controller has been proposed to the FTCS nonlinear model to improve the performance using integral sliding mode approach. The robust performance of the proposed controller for FTCS has been illustrated through simulation studies. A comparative analysis has been carried out among all the controllers in the existence of FTCS parametric uncertainty and external disturbances.","PeriodicalId":335856,"journal":{"name":"2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125302940","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and analysis of a slotted waveguide antenna array with double broken ring Meta posts for 5G (India) and C-band applications 用于5G(印度)和c波段应用的双断环Meta柱开槽波导天线阵列的设计与分析
2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE) Pub Date : 2019-03-01 DOI: 10.1109/ICSPVCE46182.2019.9092807
K. Viswanadha, N. S. Raghava
{"title":"Design and analysis of a slotted waveguide antenna array with double broken ring Meta posts for 5G (India) and C-band applications","authors":"K. Viswanadha, N. S. Raghava","doi":"10.1109/ICSPVCE46182.2019.9092807","DOIUrl":"https://doi.org/10.1109/ICSPVCE46182.2019.9092807","url":null,"abstract":"Beam sweeping is very important when it comes to RADAR applications and satellite communications. This paper illustrates the design and analysis of a multibeam metaposts loaded waveguide slotted antenna for 5G and C-band applications. The proposed antenna resonates at 3.1GHz, 3.3GHz and 4.1GHz. The proposed antenna is designed using Computer Simulation Technology Microwave Studio-2016 package (CST MWS-2016). The simulated gains at these frequencies are 11.3dBi, 14.1dBi and 12.6dBi respectively. The proposed antenna has the impedance bandwidth of 110MHz, 240MHz and 540MHz in frequency bands of 3.01GHz-3.12GHz, 3.2GHz - 3.44GHz and 3.91GHz - 4.45GHz respectively. Further, the proposed antenna is linearly polarized and has a flower-shaped radiation pattern with the side lobe level below -4.6dB. Further, the proposed antenna possesses cross polarization below -60dB.","PeriodicalId":335856,"journal":{"name":"2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133768340","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Parity Preserving Reversible Design Using FinFETs 利用finfet保持奇偶校验的可逆设计
2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE) Pub Date : 2019-03-01 DOI: 10.1109/ICSPVCE46182.2019.9092779
Lokesh Mahor, Anurag Chauhan, P. Tiwari
{"title":"Parity Preserving Reversible Design Using FinFETs","authors":"Lokesh Mahor, Anurag Chauhan, P. Tiwari","doi":"10.1109/ICSPVCE46182.2019.9092779","DOIUrl":"https://doi.org/10.1109/ICSPVCE46182.2019.9092779","url":null,"abstract":"In this article we have developed parity preserving logic with the help of FinFET using reversible logic. Parity preserving reversibility allows the design to be fault tolerant as well as power efficient. Performance of the proposed design is validated by implementing full adder and ALU using FinFET with Cadence Virtuoso at 10nm. The design is approximately 50% better than the previously proposed designs along with preserving parity and reversibility.","PeriodicalId":335856,"journal":{"name":"2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132634124","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Reconstruction of signals in quasi shift-invariant spaces from local averages 拟移位不变空间中信号的局部平均重构
2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE) Pub Date : 2019-03-01 DOI: 10.1109/ICSPVCE46182.2019.9092801
Anuj Kumar
{"title":"Reconstruction of signals in quasi shift-invariant spaces from local averages","authors":"Anuj Kumar","doi":"10.1109/ICSPVCE46182.2019.9092801","DOIUrl":"https://doi.org/10.1109/ICSPVCE46182.2019.9092801","url":null,"abstract":"This article is concerned with the average sampling in quasi shift-invariant spaces <tex>$V_{alpha}(varphi)$</tex> by considering the generator <tex>$varphi$</tex> as a totally positive function (TPF) of finite type. A function <tex>$varphi$</tex> is called the TPF of finite type <tex>$N$</tex> if <tex>$hat{varphi}(w)=prod_{l=1}^{N}(1+2pi idelta_{l}w)^{-1}$</tex> for <tex>$0neqdelta_{l}in mathbb{R}$</tex> and <tex>$Ngeq 2$</tex>. We prove that if sampling points are close enough, then all signals belonging to the quasi shift-invariant space are reconstructed stably and uniquely by using its average sample values. An efficient iterative frame reconstruction algorithm for reconstruction of a signal <tex>$gin V_{alpha}(varphi)$</tex> by using its average sample values is also provided.","PeriodicalId":335856,"journal":{"name":"2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115394665","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Reconfigurable Minitaurized Multiband Antennas For UMTS, WiMAX, WLAN & Downlink Satellite System Wireless Applications 用于UMTS, WiMAX, WLAN和下行卫星系统无线应用的可重构小型化多波段天线
2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE) Pub Date : 2019-03-01 DOI: 10.1109/ICSPVCE46182.2019.9092780
Naresh Kumar, Pradeep Kumar, Manish Sharma
{"title":"Reconfigurable Minitaurized Multiband Antennas For UMTS, WiMAX, WLAN & Downlink Satellite System Wireless Applications","authors":"Naresh Kumar, Pradeep Kumar, Manish Sharma","doi":"10.1109/ICSPVCE46182.2019.9092780","DOIUrl":"https://doi.org/10.1109/ICSPVCE46182.2019.9092780","url":null,"abstract":"In proposed antenna, multiband functional for applications such as Universal Mobile Telecommunication system (1.92GHz-2.17GHz), WiMAX (3.30GHz-3.80GHz), WLAN (5.150GHz-5.825GHz) and Downlink Satellite System (DSS: 7.25GHz-7.75GHz) is presented which is designed on Rogers RTDuroid5870 is presented. Radiating patch consist of apple shape while ground plane is rectangular in shape with corner truncated for better impedance matching. Multifunctional bands are further individually controlled by means of RF PIN diodes which are placed on stubs/slots. Two stubs provide resonance for UMTS & WiMAX application and etched slots provides resonance for WLAN and Downlink Satellite system. Antenna offers maximum gain of 7.82dBi, maximum radiation efficiency of 89% and good radiation pattern in principal planes. All the above said features make the antenna a good candidate for multiple band applications. 1","PeriodicalId":335856,"journal":{"name":"2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134415692","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Secure Link Adaptation in an Indoor Heterogeneous VLC/RF Network 室内异构VLC/RF网络中的安全链路自适应
2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE) Pub Date : 2019-03-01 DOI: 10.1109/ICSPVCE46182.2019.9092832
Ambrish, P. Garg, Akash Gupta
{"title":"A Secure Link Adaptation in an Indoor Heterogeneous VLC/RF Network","authors":"Ambrish, P. Garg, Akash Gupta","doi":"10.1109/ICSPVCE46182.2019.9092832","DOIUrl":"https://doi.org/10.1109/ICSPVCE46182.2019.9092832","url":null,"abstract":"In this paper, we consider an indoor environment where both visible light communication (VLC) and radio frequency (RF) networks are co-deployed. A source transmitter can use either a VLC-link or a RF-link to transmit the information to the legitimate user and we assume that an eavesdropper is also present to intercept the legitimate information transmission. Here, VLC network is considered as a primary network and RF network is used as a backup. Therefore, a source transmitter utilizes the RF-link only when VLC-link offers negative secrecy-rate for legitimate information transmission. In particular, we propose a secrecy-rate based secure link adaptation mechanism to select the RF-link. We derive the exact closed-form expressions for secrecy outage probability and system secrecy outage probability, and further, observe the effect of various physical parameters on security performance analysis.","PeriodicalId":335856,"journal":{"name":"2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124669756","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Performance Analysis of Grid Integrated PV System using SRF and IRPT Control 基于SRF和IRPT控制的并网光伏系统性能分析
2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE) Pub Date : 2019-03-01 DOI: 10.1109/ICSPVCE46182.2019.9092869
Avdhesh Kumar, Rachana Garg, P. Mahajan
{"title":"Performance Analysis of Grid Integrated PV System using SRF and IRPT Control","authors":"Avdhesh Kumar, Rachana Garg, P. Mahajan","doi":"10.1109/ICSPVCE46182.2019.9092869","DOIUrl":"https://doi.org/10.1109/ICSPVCE46182.2019.9092869","url":null,"abstract":"With the increase in grid connected PV based generation, degradation of power quality at the point of common coupling (PCC) has become a serious issue both for electric power utilities and consumers. Improvement in power quality is achieved through power factor correction, reactive power compensation and harmonic mitigation using different control techniques. This paper presents the performance analysis of grid integrated PV and addresses the power quality issues using synchronous reference frame (SRF) and instantaneous reactive power theory (IRPT) technique for inverter control. A 10 kW grid integrated photovoltaic system has been developed. Simulation of developed model is carried out on MATLAB/Simulink.","PeriodicalId":335856,"journal":{"name":"2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116027784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Signal Processing, VLSI and Communication Engineering (ICSPVCE-2019) 信号处理、VLSI与通信工程(ICSPVCE-2019)
2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE) Pub Date : 2019-03-01 DOI: 10.1109/ICSPVCE46182.2019.9092826
Yice Chancetlor, Y. Singh, S. Garg
{"title":"Signal Processing, VLSI and Communication Engineering (ICSPVCE-2019)","authors":"Yice Chancetlor, Y. Singh, S. Garg","doi":"10.1109/ICSPVCE46182.2019.9092826","DOIUrl":"https://doi.org/10.1109/ICSPVCE46182.2019.9092826","url":null,"abstract":"Signal Processing, VLSI and Communication Engineering (ICSPVCE-2019)","PeriodicalId":335856,"journal":{"name":"2019 1st International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115147794","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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