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2003 IEEE International Conference on SOI最新文献

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SOI nano-technology for high-performance system on-chip applications 用于高性能系统片上应用的SOI纳米技术
2003 IEEE International Conference on SOI Pub Date : 2003-11-03 DOI: 10.1109/SOI.2003.1242876
J. Plouchart
{"title":"SOI nano-technology for high-performance system on-chip applications","authors":"J. Plouchart","doi":"10.1109/SOI.2003.1242876","DOIUrl":"https://doi.org/10.1109/SOI.2003.1242876","url":null,"abstract":"This paper presents the potential of the SOI technology in the nanometer regime for high-performance applications integrating the RF transceiver with the microprocessor and its embedded DRAM. Owing to its low-parasitic and high-Q passives integrated in a standard micro-processor technology, SOI CMOS can expand CMOS technology into the millimeter-wave frequency. Several examples of CML, VCO and amplifier circuits are provided.","PeriodicalId":329294,"journal":{"name":"2003 IEEE International Conference on SOI","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132868840","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
A new block refresh concept for SOI floating body memories SOI漂浮体记忆的块刷新新概念
2003 IEEE International Conference on SOI Pub Date : 2003-11-03 DOI: 10.1109/SOI.2003.1242879
P. Fazan, S. Okhonin, M. Nagoga
{"title":"A new block refresh concept for SOI floating body memories","authors":"P. Fazan, S. Okhonin, M. Nagoga","doi":"10.1109/SOI.2003.1242879","DOIUrl":"https://doi.org/10.1109/SOI.2003.1242879","url":null,"abstract":"In this paper, we describe a new memory refresh scheme (named \"block refresh\") to be used to further reduce power consumption and improve memory performance.","PeriodicalId":329294,"journal":{"name":"2003 IEEE International Conference on SOI","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133104785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Photonic bandgap microcavities and waveguides 光子带隙微腔与波导
2003 IEEE International Conference on SOI Pub Date : 2003-11-03 DOI: 10.1109/SOI.2003.1242878
A. Scherer, M. Lončar, T. Yoshie, K. Okamoto, B. Maune, J. Witzens
{"title":"Photonic bandgap microcavities and waveguides","authors":"A. Scherer, M. Lončar, T. Yoshie, K. Okamoto, B. Maune, J. Witzens","doi":"10.1109/SOI.2003.1242878","DOIUrl":"https://doi.org/10.1109/SOI.2003.1242878","url":null,"abstract":"In this paper, we describe the use of photonic crystals in functional nonlinear optical devices, such as lasers, modulators, add/drop filters, polarizers and detectors.","PeriodicalId":329294,"journal":{"name":"2003 IEEE International Conference on SOI","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127871444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A CMOS active pixel sensor on silicon-on-sapphire substrate with backside illumination 一种背面照明的蓝宝石硅衬底CMOS有源像素传感器
2003 IEEE International Conference on SOI Pub Date : 2003-11-03 DOI: 10.1109/SOI.2003.1242916
Chao Shen, Chen Xu, Ru Huang, P. Ko, M. Chan
{"title":"A CMOS active pixel sensor on silicon-on-sapphire substrate with backside illumination","authors":"Chao Shen, Chen Xu, Ru Huang, P. Ko, M. Chan","doi":"10.1109/SOI.2003.1242916","DOIUrl":"https://doi.org/10.1109/SOI.2003.1242916","url":null,"abstract":"In this paper, we proposed a new architecture of SOI APS on silicon-on-sapphire substrate. A number of unique features are identified in the new architecture including: backside illumination through the transparent substrate to improve optical absorption; PMOSFET reset transistor to increase voltage swing; lateral PIN photodiode to increase sensitivity. The SOS APS has been fabricated and verified to work at low V/sub DD/ of 1.2V.","PeriodicalId":329294,"journal":{"name":"2003 IEEE International Conference on SOI","volume":"135 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114652966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Charge pumping effects in partially depleted SOI MOSFETs 部分耗尽SOI mosfet中的电荷泵送效应
2003 IEEE International Conference on SOI Pub Date : 2003-11-03 DOI: 10.1109/SOI.2003.1242904
S. Okhonin, M. Nagoga, P. Fazan
{"title":"Charge pumping effects in partially depleted SOI MOSFETs","authors":"S. Okhonin, M. Nagoga, P. Fazan","doi":"10.1109/SOI.2003.1242904","DOIUrl":"https://doi.org/10.1109/SOI.2003.1242904","url":null,"abstract":"In this paper we describe the impact of the charge pumping effect on the on the partially depleted SOI MOSFET. We also compare the CP with other physical effects such as impact ionization and the valence band electron tunneling.","PeriodicalId":329294,"journal":{"name":"2003 IEEE International Conference on SOI","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128706435","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
The G/sup 4/-FET: low voltage to high voltage operation and performance G/sup 4/-FET:低电压到高压的工作和性能
2003 IEEE International Conference on SOI Pub Date : 2003-11-03 DOI: 10.1109/SOI.2003.1242895
B. Dufrene, K. Akarvardar, S. Cristoloveanu, B. Blalock, P. Fechner, M. Mojarradi
{"title":"The G/sup 4/-FET: low voltage to high voltage operation and performance","authors":"B. Dufrene, K. Akarvardar, S. Cristoloveanu, B. Blalock, P. Fechner, M. Mojarradi","doi":"10.1109/SOI.2003.1242895","DOIUrl":"https://doi.org/10.1109/SOI.2003.1242895","url":null,"abstract":"We present the operational and performance of the 4-gate transistor (G/sup 4/-FET) from the low voltage to the high voltage regime. Measured results show the complexity of threshold voltage, subthreshold swing, and breakdown voltage due to the multiple gate control utilized with the G/sup 4/-FET. Devices fabricated in a 0.35 /spl mu/m 3.3 V partially-depleted SOI process can achieve a breakdown voltage of 15 V, excellent subthreshold swing, and high mobility.","PeriodicalId":329294,"journal":{"name":"2003 IEEE International Conference on SOI","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123205031","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Double gate MOSFET subthreshold logic for ultra-low power applications 超低功耗应用的双栅极MOSFET亚阈值逻辑
2003 IEEE International Conference on SOI Pub Date : 2003-11-03 DOI: 10.1109/SOI.2003.1242913
Jae-Joon Kim, K. Roy
{"title":"Double gate MOSFET subthreshold logic for ultra-low power applications","authors":"Jae-Joon Kim, K. Roy","doi":"10.1109/SOI.2003.1242913","DOIUrl":"https://doi.org/10.1109/SOI.2003.1242913","url":null,"abstract":"In this paper, we show that double gate MOSFET is a promising device for subthreshold operations due to its (1) steep subthreshold slope (s) and (2) small gate capacitance in the subthreshold region. It is also shown that long channel DG MOSFET is better than short channel DG MOSFET for subthreshold operations in terms of performance and tolerance to process variation.","PeriodicalId":329294,"journal":{"name":"2003 IEEE International Conference on SOI","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121747052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Proton induced single event upset in a 4M SOI SRAM 4M SOI SRAM中质子引起的单事件破坏
2003 IEEE International Conference on SOI Pub Date : 2003-11-03 DOI: 10.1109/SOI.2003.1242884
H. Liu, S. T. Liu, K. Golke, D. Nelson, W. Heikkila, W. Jenkins
{"title":"Proton induced single event upset in a 4M SOI SRAM","authors":"H. Liu, S. T. Liu, K. Golke, D. Nelson, W. Heikkila, W. Jenkins","doi":"10.1109/SOI.2003.1242884","DOIUrl":"https://doi.org/10.1109/SOI.2003.1242884","url":null,"abstract":"A non-conventional upset mechanism is proposed to explain the proton test results for our 4M SOI SRAM for the first time in this paper. In a hardened SRAM cell where an active delay element is often used in the feedback loop, single particle hits to a single critical node are not likely to cause an SEU upset. However, when the secondary heavy ions, created by the interactions between high-energy protons and Si nuclei, travel through a critical node as well as the pass gate inside the delay element, the delay element will be shunted out by charge deposited and as a result the stored state can easily be disturbed. Simple calculations based on this assumption yield good correlation to test results in terms of upset cross-section. This upset mechanism will play a more important role as device geometries shrink.","PeriodicalId":329294,"journal":{"name":"2003 IEEE International Conference on SOI","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115165617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
NiSi MOCVD for fabricating FinFETs and UTB-SOI devices 用于制造finfet和UTB-SOI器件的NiSi MOCVD
2003 IEEE International Conference on SOI Pub Date : 2003-11-03 DOI: 10.1109/SOI.2003.1242902
A. Ogura, H. Wakabayashi, M. Ishikawa, T. Kada, H. Machida, Y. Ohshita
{"title":"NiSi MOCVD for fabricating FinFETs and UTB-SOI devices","authors":"A. Ogura, H. Wakabayashi, M. Ishikawa, T. Kada, H. Machida, Y. Ohshita","doi":"10.1109/SOI.2003.1242902","DOIUrl":"https://doi.org/10.1109/SOI.2003.1242902","url":null,"abstract":"We investigated the use of NiSi MOCVD for fabricating FinFETs and UTB-SOI devices. MeCp/sub 2/Ni was synthesized as a Ni precursor. The NiSi film deposited using MeCp/sub 2/Ni and Si/sub 3/H/sub 6/ had a smooth interface with the Si substrate without Ni penetration. The step coverage of the deposited film on a patterned substrate was excellent.","PeriodicalId":329294,"journal":{"name":"2003 IEEE International Conference on SOI","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122074769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Fully-depleted SOI process optimization for 60 nm CMOS transistors 60纳米CMOS晶体管的全耗尽SOI工艺优化
2003 IEEE International Conference on SOI Pub Date : 2003-11-03 DOI: 10.1109/SOI.2003.1242885
C. Fenouillet-Béranger, F. Fruleux, A. Talbot, L. Tosti, R. Palla, M. Cassé, N. Carriere, A. Grouillet, C. Raynaud, B. Giffard, T. Skotnicki
{"title":"Fully-depleted SOI process optimization for 60 nm CMOS transistors","authors":"C. Fenouillet-Béranger, F. Fruleux, A. Talbot, L. Tosti, R. Palla, M. Cassé, N. Carriere, A. Grouillet, C. Raynaud, B. Giffard, T. Skotnicki","doi":"10.1109/SOI.2003.1242885","DOIUrl":"https://doi.org/10.1109/SOI.2003.1242885","url":null,"abstract":"In this paper, we propose to study the main important technological parameters (Tsi, film doping and gate oxide influence) to give process orientations for 60nm gate lengths CMOS transistors optimization.","PeriodicalId":329294,"journal":{"name":"2003 IEEE International Conference on SOI","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122090666","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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