10th IEEE International Symposium on Industrial Embedded Systems (SIES)最新文献

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Semi-online power estimation for smartphone hardware components 智能手机硬件组件半在线功率估计
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185058
Ekarat Rattagan, E. Chu, Ying-Dar Lin, Y. Lai
{"title":"Semi-online power estimation for smartphone hardware components","authors":"Ekarat Rattagan, E. Chu, Ying-Dar Lin, Y. Lai","doi":"10.1109/SIES.2015.7185058","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185058","url":null,"abstract":"With low cost, ease of use, and scalability, online power estimation, which uses data obtained from battery monitoring unit (BMU) to estimate power consumption, could be a potential power estimation method for commercial smartphones. However, existing online power estimation methods exhibit high errors compared with the use of external power monitors. This is because they do not tackle three main factors which effect the efficacy of online power estimations: (1) the battery capacity degradation, (2) the asynchronous power consumption behavior, and (3) the effect of state of charge (SOC) difference. In this paper, we present a semi-online power estimation method which adopted the charging data to determine the actual battery capacity, applied the discrepancy of battery voltage for asynchronous power detection, and analyzed the optimal SOC for the hardware training. We validate the proposed method by conducting a series of experiments on a commercial smartphone and comparing its results with the existing online power estimation methods. Our results indicate that, the semi-online method can reduce the error rates of the average power estimates by 86.66%. Moreover, the experiment reveals that the battery capacity degradation has the major effect on the efficacy of online power estimations.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"204 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115184793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A framework architecture for student learning in distributed embedded systems 分布式嵌入式系统中学生学习的框架体系结构
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185052
W. L. Honig, Konstantin Läufer, G. Thiruvathukal
{"title":"A framework architecture for student learning in distributed embedded systems","authors":"W. L. Honig, Konstantin Läufer, G. Thiruvathukal","doi":"10.1109/SIES.2015.7185052","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185052","url":null,"abstract":"Academic courses focused on individual microcomputers or client/server applications are no longer sufficient for students to develop knowledge in embedded systems. Current and near-term industrial systems employ multiple interacting components and new network and security approaches; hence, academic preparation requires teaching students to develop realistic projects comparable to these real-world products. However, the complexity, breadth, and technical variations of these real-world products are difficult to reproduce in the classroom. This paper outlines preliminary work on a framework architecture suitable for academic teaching of modern embedded systems including the Internet of Things. It defines four layers, two of which are at the edges of the network, and not adequately covered in academia. For each layer of the architecture, specific technology and suitable devices are identified. Desired academic outcomes for courses using projects based on the architecture are identified. Feedback and comparison is sought on how effective student course and research activities based on the framework will be to real-world embedded systems developers.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115021085","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
From modes to patterns: Pattern-based resource management in time-critical applications 从模式到模式:时间关键型应用程序中基于模式的资源管理
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185060
R. H. Mak, Ionut David, J. Lukkien
{"title":"From modes to patterns: Pattern-based resource management in time-critical applications","authors":"R. H. Mak, Ionut David, J. Lukkien","doi":"10.1109/SIES.2015.7185060","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185060","url":null,"abstract":"Resource management is a vital activity of many resource platforms. For time-critical applications the principle resource to be managed is processor time. For many streaming video applications processor usage of their individual components follows a limited set of modes each of which represents a small range of processor utilization values. In this paper, we show that these modes often follow specific patterns which can be detected by monitoring processor usage at runtime. Furthermore, a cost-effective pattern detection algorithm is presented and a class of strategies is defined that use patterns to predict future resource usage. These strategies are capable of extending the reservation period beyond the next mode, which is the standard for mode-based resource management, Thus, not only management effort is reduced, but also the quality of the reservations is increased. To determine reservation quality, metrics are used that measure the extent of both over- and under-provisioning. The applicability of the detection method and strategies is illustrated through a set of experiments. One set of experiments shows the existence, rapid emergence and ease of detection of patterns. Another set of experiments demonstrates the reservation quality for several strategies, and indicates the dependence of that quality on the parameters used to select the strategy from the defined class. Thus it is shown that pattern-based management provides a cost-effective and accurate means to manage processor utilization of individual components and therefore can be used both for intra-and inter-application resource management.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128811314","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Building an interactive test development environment for cyclic executive systems 为循环执行系统构建一个交互式测试开发环境
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185048
G. Langelier, A. Dury, A. Petrenko, S. Ramesh, T. Assaf
{"title":"Building an interactive test development environment for cyclic executive systems","authors":"G. Langelier, A. Dury, A. Petrenko, S. Ramesh, T. Assaf","doi":"10.1109/SIES.2015.7185048","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185048","url":null,"abstract":"Modern cars contain millions of lines of code and this number is increasing with each new generation of vehicles. Errors in this software can lead to serious quality and safety concerns. While automating such process completely is often considered as a long term goal, providing interactive tools facilitating test generation is a more realistic and desired step by the automotive industry at this stage. Addressing this need, the goal of this research is to offer an interactive toolset automating generation of tests that reach targets defined by the test engineers as global states of software components of cyclic executive systems. We describe an approach based on symbolic code execution combined with constraint solving and tailored to cyclic executives. A prototype implementing the approach, called SeerC, has been developed and applied to a real-life powertrain software component to assess its usefulness and scalability. Experimental results indicate that the proposed approach outperforms the comparable tool CBMC.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132796539","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Supporting firm real-time traffic in fault-tolerant real-time systems based on cyclic scheduling — The WICKPro protocol 在基于循环调度的容错实时系统中支持可靠的实时流量- WICKPro协议
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185047
J. Aísa, J. L. Villarroel
{"title":"Supporting firm real-time traffic in fault-tolerant real-time systems based on cyclic scheduling — The WICKPro protocol","authors":"J. Aísa, J. L. Villarroel","doi":"10.1109/SIES.2015.7185047","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185047","url":null,"abstract":"Industrial control network research has become increasingly interested in wireless multi-hop networks over the last years. These wireless networks present several advantages over wired networks, but unfortunately they are usually error-prone. Although packet losses can be counterbalanced by retransmissions, this can jeopardize the deadlines of the supported traffic. For this reason, a fault-tolerant design which carries out a feasibility analysis is essential to provide probabilistic scheduling guarantees. In this paper, we analyze and enhance the wireless chain network protocol (WICKPro) from a fault-tolerant realtime system perspective. WICKPro is a medium access control and routing protocol designed for wireless mesh networks with chain topologies which supports firm real-time traffic and is implemented over 802.11. It uses a token-passing scheme and is based on both an off-line and an on-line packet scheduler. The offline cyclic packet scheduler reserves time for packet transmissions and retransmissions, whereas the on-line packet scheduler drops packets when losses are higher than those reserved for a specific period of time. WICKPro features are evaluated in laboratory and field experiments.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134258404","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Integrating Linux and the real-time ERIKA OS through the Xen hypervisor 通过Xen hypervisor集成Linux和实时ERIKA操作系统
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185063
Arianna Avanzini, P. Valente, Dario Faggioli, Paolo Gai
{"title":"Integrating Linux and the real-time ERIKA OS through the Xen hypervisor","authors":"Arianna Avanzini, P. Valente, Dario Faggioli, Paolo Gai","doi":"10.1109/SIES.2015.7185063","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185063","url":null,"abstract":"Modern user interfaces grow more and more complex and cannot be possibly handled by the same software components in charge of the timely execution of safety-critical control tasks. Evidence Srl recently proposed a single-board dual-OS system aimed at combining the flexibility of the Linux general-purpose operating system, which is able to produce any complex user interface, and the reliability of the automotive-grade ERIKA Enterprise operating system, a small-footprint real-time OS suitable for safety-critical control tasks and able to execute commands triggered by Linux. The operating systems run on dedicated cores and, for efficiency reasons, they share memory with limited support for memory protection: although the system allows running two operating systems, from a safety certification point of view it suffers from the fact that safety-critical and non-safety-critical components should be isolated from each other. In this paper we present, as an improvement to the initial implementation, again a double-OS system running, on a dual-core platform, ERIKA Enterprise and a full-featured Linux OS, but using the Xen hypervisor to run the two operating systems in two isolated domains. In the proposed setup, each of the domains runs on a dedicated core, assigned statically by the hypervisor. Linux runs as the control domain, and is therefore able to execute any of the components of the Xen toolstack; it is also able to grant to the real-time operating system access to any I/O-memory range needed for control tasks. The described system also provides a simple, safe communication mechanism between the two operating systems, based on Xen's inter-domain event notification primitives and explicit sharing of a dedicated set of memory pages by the real-time operating system.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121799821","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Wormhole networks properties and their use for optimizing worst case delay analysis of many-cores 虫洞网络的特性及其在优化多核最坏情况延迟分析中的应用
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185041
Laure Abdallah, M. Jan, Jérôme Ermont, C. Fraboul
{"title":"Wormhole networks properties and their use for optimizing worst case delay analysis of many-cores","authors":"Laure Abdallah, M. Jan, Jérôme Ermont, C. Fraboul","doi":"10.1109/SIES.2015.7185041","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185041","url":null,"abstract":"Many-core architectures are promising hardware to design hard real-time systems as they are based on simpler and thus more predictable processors than multi-core systems. However, the worst-case behavior of the Network-on-Chip (NoC) for both inter-core and core to external memories or peripherals communications must be established. Several NoCs targeting hard real-time systems, made of specific hardware extensions, have been designed. However, none of these extensions are currently available in commercially existing NoC-based many-core architectures, that instead rely on wormhole switching with round-robin arbitration. In this paper, we thus demonstrate three properties of such NoC-based wormhole networks to identify worst-case scenarios and reduce the pessimism when modeling flows in contentions. We then describe and evaluate an algorithm to compute Worst-Case Traversal Time (WCTT) of flows that uses these properties. In particular, our results show that the pessimism can be reduced up to 50% compared to current state-of-the-art real-time packet schedulability analysis.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123320665","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 24
Monitoring of I/O for safety-critical systems using PCI express advanced error reporting 使用PCI express高级错误报告监控安全关键系统的I/O
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185049
Daniel Münch, M. Paulitsch, A. Herkersdorf
{"title":"Monitoring of I/O for safety-critical systems using PCI express advanced error reporting","authors":"Daniel Münch, M. Paulitsch, A. Herkersdorf","doi":"10.1109/SIES.2015.7185049","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185049","url":null,"abstract":"Certification is the process in which a manufacturer has to prove to authorities that an aircraft and systems like safety-critical avionic systems work safely as intended without unacceptable hazards. Means to achieve this are redundancy, separation/protection, monitoring, and recovery mechanisms. The objective of this paper is to provide a cost-efficient solution for monitoring of Commercial Off-The-Shelf (COTS) Input/Output (I/O) devices using COTS components and standards. The first contribution of this paper is an evaluation-proved single-event monitoring concept to permit PCI Express (PCIe) debugging without an expensive PCIe protocol analyzer and to facilitate build-in self-tests for COTS PCIe I/O devices. This is proved with an evaluation. The second contribution is a run-time monitoring concept to monitor, detect, prevent errors and to recover from errors for spatial separation of COTS PCIe I/O devices during operation. Both monitoring types use only available PCIe-compatible COTS components. This makes them portable to various computing architectures (Intel, ARM, PowerPC) and applicable for existing I/O virtualization and I/O sharing solutions. A practical evaluation reveals that the performance overhead (transfer time, transfer rate) inserted by the run-time monitoring is with 0.88% small and insignificant.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133054005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Real-time DRAM throughput guarantees for latency sensitive mixed QoS MPSoCs 实时DRAM吞吐量保证延迟敏感的混合QoS mpsoc
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185038
L. Ecco, Selma Saidi, Adam Kostrzewa, R. Ernst
{"title":"Real-time DRAM throughput guarantees for latency sensitive mixed QoS MPSoCs","authors":"L. Ecco, Selma Saidi, Adam Kostrzewa, R. Ernst","doi":"10.1109/SIES.2015.7185038","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185038","url":null,"abstract":"The trend towards integration is leading to the design of multi- and many-core platforms that accommodate processing tiles (requestors) with different memory requirements. Such platforms require a memory controller capable of providing low-latency best-effort (BE) service for some requestors and guaranteed throughput (GT) for others. Although there are realtime controllers that support the concept of different traffic classes, they do not efficiently handle scenarios with multiple BE and GT requestors. We propose a memory controller that tackles this problem, providing low latency for BE requestors and real-time guarantees for GT ones. We support the guarantees with a formal timing analysis. Our experiments confirm that our approach enforces tight guarantees for GT requestors, while simultaneously reducing the latency of BE ones by up to 67%, when compared with a baseline memory controller.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121730752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Real-time network traffic handling in FASA FASA中的实时网络流量处理
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185044
R. Eidenbenz, T. Sivanthi, A. Monot, Jun Liu
{"title":"Real-time network traffic handling in FASA","authors":"R. Eidenbenz, T. Sivanthi, A. Monot, Jun Liu","doi":"10.1109/SIES.2015.7185044","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185044","url":null,"abstract":"FASA (Future Automation System Architecture) is a scalable, flexible, and platform-independent real-time execution framework for executing cyclic applications on multiple CPU cores or even across multiple devices. By design, FASA does not support event-driven tasks, such as handling of I/O and network communication. However, providing support for event handling is vital to broaden FASA's applicability to other domains, for instance, digital substation automation, where we have distributed automation systems with event-driven real-time communication services. In this work, we discuss solutions for enabling event-driven communication services in FASA and present an example design that integrates IEC 61850 real-time communication services into FASA. The design is implemented on Linux OS with Preempt-RT patch, and using an open-source library, Rapid61850, that provides the necessary APIs for IEC 61850 communication. We evaluate the implementation with respect to handling two IEC 61850 real-time communication services, namely Sampled Values and GOOSE (Generic Object-Oriented Substation Events).","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116940922","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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