10th IEEE International Symposium on Industrial Embedded Systems (SIES)最新文献

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A new Profibus-DP interface for CERN's sputter ion pump controllers 一个新的Profibus-DP接口,用于CERN的溅射离子泵控制器
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185043
M. Roda, L. Mendes, P. Gomes, G. Pigny, Sérgio Faria
{"title":"A new Profibus-DP interface for CERN's sputter ion pump controllers","authors":"M. Roda, L. Mendes, P. Gomes, G. Pigny, Sérgio Faria","doi":"10.1109/SIES.2015.7185043","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185043","url":null,"abstract":"This paper proposes an improvement on the read-out and networking of the sputter ion pump (VPI) controllers, used in CERN accelerators for ultra-high vacuum pumping and measurement. The vacuum control systems are built around PLCs (Programmable Logic Controllers), which communicate through Profibus with several distributed IO-stations. The VPI controllers are connected to these stations via individual and simple cabling. A new Profibus-DP slave interface was developed, to be embedded in the VPI controllers, in order to enhance remote access and to reduce cabling complexity. This paper presents the developed hardware and software, together with the corresponding assessment tests.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115923221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Model checking of finite-state machine-based scenario-aware dataflow using timed automata 基于时间自动机的基于有限状态机的场景感知数据流模型检验
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185065
Mladen Skelin, E. R. Wognsen, Mads Chr. Olesen, René Rydhof Hansen, K. Larsen
{"title":"Model checking of finite-state machine-based scenario-aware dataflow using timed automata","authors":"Mladen Skelin, E. R. Wognsen, Mads Chr. Olesen, René Rydhof Hansen, K. Larsen","doi":"10.1109/SIES.2015.7185065","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185065","url":null,"abstract":"Dataflow formalisms are widely used for modeling and analyzing streaming applications. An important distinction is between static and dynamic formalisms, the latter allowing for the workload to change on-the-fly. The recently introduced finite-state machine based scenario aware dataflow (FSM-SADF) is a dynamic dataflow formalism that increases the expressiveness of the static synchronous dataflow (SDF) formalism, by allowing finite-state control, while to a large extent retaining its design-time analyzability. This paper reports on the translation of the FSM-SADF formalism to UPPAAL timed automata that enables a more general verification than currently supported by existing tools. We base our translation on a compositional approach where the input FSM-SADF model is represented as a parallel composition of its integral components modeled as automata. Thereafter, we show how to model check quantitative and qualitative properties both supported and not supported by the existing tools. We demonstrate our approach on a realistic case study from the multimedia domain.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128475648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
TTEthernet SW-based end system for AUTOSAR 基于无线网络的AUTOSAR终端系统
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185037
Thom W. Frühwirth, W. Steiner, Bernhard Stangl
{"title":"TTEthernet SW-based end system for AUTOSAR","authors":"Thom W. Frühwirth, W. Steiner, Bernhard Stangl","doi":"10.1109/SIES.2015.7185037","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185037","url":null,"abstract":"The requirements, functionality, and consequently also the complexity of software used in the automotive industry has continuously been increasing over the last decades. To cope with this development, main car manufacturing companies and automotive suppliers established the AUTOSAR partnership back in 2003. Its main objective is to reduce development costs and to enhance cooperation between different companies by creating standards and specifications for automotive software applications. With the increasing number of ECUs and vision-based advanced driver assistance systems higher communication speeds than provided by nowadays state-of-the-art bus systems like CAN and FlexRay are desired. The tremendous success story of standard Ethernet has led to various enhancements for different industries to make its benefits also available for safety-critical and real-time applications. One of these enhancements is TTEthernet. In this paper we demonstrate and evaluate the integration of TTEthernet in AUTOSAR. We suggest how the AUTOSAR Ethernet stack can be partitioned to support mixed-criticality traffic and how different traffic types can be integrated on a single physical interface. Furthermore, we give an efficient implementation of the TTEthernet clock synchronization algorithm by utilizing state-of-the-art Ethernet hardware controller features. Finally, the TTEthernet implementation is compared to a standard Ethernet implementation as specified by AUTOSAR, with respect to computational and memory overhead.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"02 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128797860","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Keynote Talks: Requirements on E/E-system architecture for future car concepts — Example eMobility with project RACE 主题演讲:未来汽车概念对E/E系统架构的要求——以RACE项目的eMobility为例
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185033
G. Spiegelberg, H. Kopetz, A. Crespo
{"title":"Keynote Talks: Requirements on E/E-system architecture for future car concepts — Example eMobility with project RACE","authors":"G. Spiegelberg, H. Kopetz, A. Crespo","doi":"10.1109/SIES.2015.7185033","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185033","url":null,"abstract":"These tutorials discuss the following: requirements on E/E-system architecture for future car concepts - example eMobility with project RACE; Complexity management in cyber-physical system-of-systems; and Challenges in embedded multicore system virtualization for critical systems.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125370206","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Time-triggered communication scheduling analysis for real-time multicore systems 实时多核系统的时间触发通信调度分析
10th IEEE International Symposium on Industrial Embedded Systems (SIES) Pub Date : 2015-06-08 DOI: 10.1109/SIES.2015.7185046
Matthias Freier, Jian-Jia Chen
{"title":"Time-triggered communication scheduling analysis for real-time multicore systems","authors":"Matthias Freier, Jian-Jia Chen","doi":"10.1109/SIES.2015.7185046","DOIUrl":"https://doi.org/10.1109/SIES.2015.7185046","url":null,"abstract":"The demand for more computing power in current real-time systems carries on the development and research on multicore devices. Especially for hard real-time applications, like an engine control system, the software needs to be distributed and scheduled effectively. These applications consist of many tasks, which communicate data among each other. Considering a multicore system, communication between cores may require a lot of time. A bus architecture becomes a communication bottleneck with an increasing number of cores. Therefore, we consider a scalable communication structure like a Network-on-Chip (NoC). This paper studies the schedulability analysis of tangled tasks by resolving the communication dependencies with a Time-Triggered Constant Phase (TTCP) scheduler. A TTCP scheduler assigns periodic time slots for each computation and each communication entity. With the TTCP approach, we can highly utilize the NoC and the cores considering a tangled task model. However, this approach requires a method getting a feasible set of these time slots. We provide a schedulability analysis and a heuristic algorithm, that runs in pseudo-polynomial time complexity, for assigning the time slots. Experiments confirm this result and show the effectiveness of our heuristic algorithm for assigning the time slots for our approach. For typical industrial task sets with 1000 tasks, our approach can utilize the NoC by around 60%, while holding all real-time constraints.","PeriodicalId":328716,"journal":{"name":"10th IEEE International Symposium on Industrial Embedded Systems (SIES)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125088168","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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