2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE)最新文献

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A new approach for iris image identification using modified contour segmentation 基于改进轮廓分割的虹膜图像识别新方法
C. Narmatha, S. Manimurugan
{"title":"A new approach for iris image identification using modified contour segmentation","authors":"C. Narmatha, S. Manimurugan","doi":"10.1109/ICGCCEE.2014.6921399","DOIUrl":"https://doi.org/10.1109/ICGCCEE.2014.6921399","url":null,"abstract":"The iris is an externally visible, yet protected organ whose unique epigenetic pattern remains stable throughout adult life. These characteristics make it very attractive for use as a biometric for identifying individuals. Image processing techniques can be employed to extract the unique iris pattern from a digitized image of the eye, and encode it into a biometric template, which can be stored in a database. In this paper has been proposed the modified contour segmentation for iris image segmentation. This biometric template contains an objective mathematical representation of the unique information stored in the iris, and allows comparisons to be made between templates. When a subject wishes to be identified by iris recognition system, their eye is first photographed, and then a template, combination of contour, pattern matching and coding techniques are created for their iris region. This template is then compared with the other templates stored in a database until either a matching template is found and the subject is identified, or no match is found and the subject remains unidentified. An effective authentication method should have customer acceptance, reliable performance, scalability to accommodate growth, and interoperability with existing systems and future plans.","PeriodicalId":328137,"journal":{"name":"2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122020345","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
A distributed computer machine vision system for automated inspection and grading of fruits 用于水果自动检测和分级的分布式计算机机器视觉系统
S. Yogitha, P. Sakthivel
{"title":"A distributed computer machine vision system for automated inspection and grading of fruits","authors":"S. Yogitha, P. Sakthivel","doi":"10.1109/ICGCCEE.2014.6922281","DOIUrl":"https://doi.org/10.1109/ICGCCEE.2014.6922281","url":null,"abstract":"A computer machine vision system that can be used for automatic high-speed fruit sorting and grading is proposed. The objective of the project is to develop the advanced quality control inspection system makes use of distributed network architecture to interface the camera unit to a computer system through GigE LAN environment in a flexible way. The development work activity involves in dynamic capturing of image signal from camera when the objects are moving on the conveyor in real time based on synchronized trigger events. This project planned to do in visual studio using OpenCV. The process involved for estimating the colour information and geometry parameters makes use of sequence of complex library functionality like removing the noise, detecting the edges, smoothing, dilate, erode, filling, deblurring, filtering, histogram, colour values, pixel averaging, etc.","PeriodicalId":328137,"journal":{"name":"2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129693417","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A cross-layer topology control with clustering and routing for energy efficient wireless sensor networks 基于聚类和路由的高能效无线传感器网络跨层拓扑控制
S. Patil, D. Gothawal, Sanjeev J Wagh
{"title":"A cross-layer topology control with clustering and routing for energy efficient wireless sensor networks","authors":"S. Patil, D. Gothawal, Sanjeev J Wagh","doi":"10.1109/ICGCCEE.2014.6922454","DOIUrl":"https://doi.org/10.1109/ICGCCEE.2014.6922454","url":null,"abstract":"Wireless sensor networks (WSNs) are a self-organized networks and they are formed by dynamic topologies. Due to the constantly changing topology in WSN, it is a challenging task to tackle energy utilization of sensor nodes and ensure the end-to-end path between nodes and the sink. The existing mechanisms are inefficient to ensure availability of routes, while consuming minimal power, when the change in the network topology occurs. In this paper, we propose a novel cross-layer solution that jointly considers routing and topology control. The primary goal of the proposed solution is to reduce the energy consumption and find end-to-end routes for WSN. We evaluate the performance of the proposed system by simulating a set of random wireless sensor network (WSN) environments. Evaluation results of proposed solution show an effectiveness and efficiency in terms of reducing in energy consumption.","PeriodicalId":328137,"journal":{"name":"2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129474269","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Estimation of sensitive node for IEEE-30 bus system by load variation 基于负荷变化的IEEE-30总线系统敏感节点估计
Divya B M Tech Scholar, A. Prof.
{"title":"Estimation of sensitive node for IEEE-30 bus system by load variation","authors":"Divya B M Tech Scholar, A. Prof.","doi":"10.1109/ICGCCEE.2014.6922357","DOIUrl":"https://doi.org/10.1109/ICGCCEE.2014.6922357","url":null,"abstract":"In deregulated power systems, the issue of voltage stability causes major blackouts. This result in collapse of transmission system and is mostly affected due to frequent variations in load. In this paper, we will focus on the determination of most sensitive node in IEEE - 30 bus system. For this study, we are using PSAT, a MATLAB Based Simulink & Simulation toolbox which utilizes L-index method for voltage stability analysis and sensitive nodes determination. For the evaluation of sensitive node we have analyzed IEEE-30 bus system under the standard test data and then subjected to increase in load data by 5%, 10% and so on up to 40%. And then all the results are compared with the original power flow results of IEEE-30 bus system for determining a most sensitive node.","PeriodicalId":328137,"journal":{"name":"2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129929382","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Image authentication using global and local features 使用全局和本地特性的映像身份验证
S. Jothimani, P. Betty
{"title":"Image authentication using global and local features","authors":"S. Jothimani, P. Betty","doi":"10.1109/ICGCCEE.2014.6921402","DOIUrl":"https://doi.org/10.1109/ICGCCEE.2014.6921402","url":null,"abstract":"Image authentication is the process of proving image integrity and authenticity. Robust hashing method is developed for detecting image forgery which includes removal, insertion of objects, and abnormal color modification. Global, local and shape features are used in forming the hash. Global features are based on Zernike moments which represent luminance and chrominance characteristics of the image. The local features include position and texture information of salient regions in the image. Shape Feature provides an outstanding description of the geometric structure of shapes. Secret keys are introduced in feature extraction and hash construction. The hash value of a test image is compared with that of a reference image. When the hash distance is greater than or less than a threshold, the received image is judged as a forged image. Collision probability is very low.","PeriodicalId":328137,"journal":{"name":"2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127030430","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Speech recognition open source tools for the semantic identification of the sentence 语音识别开源工具,用于句子的语义识别
R. Shanmugapriya, S. RajaMohammed
{"title":"Speech recognition open source tools for the semantic identification of the sentence","authors":"R. Shanmugapriya, S. RajaMohammed","doi":"10.1109/ICGCCEE.2014.6921401","DOIUrl":"https://doi.org/10.1109/ICGCCEE.2014.6921401","url":null,"abstract":"In the NLP world the recognizing speech as in the voice recognition and also allowing voice to serve as the \"main interface between the human and the computer. This paper mainly focuses on the tools that are used to deliver how current speech recognition technology facilitates the learning part of the students, and also in what way the technology will be help to developing the advance learning system for future. The tools like speech to text conversion are to be discussed in this paper and also focused some attributes for the semantic identification. Although speech recognition has a potential benefit for students with physical disabilities and harsh learning disabilities, these are the technology in which it has been implemented inconsistently in the classroom above the years. By means of this the knowledge continues to develop, on the other hand, various issues are being addressed.","PeriodicalId":328137,"journal":{"name":"2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129101960","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Efficient charge recovery logic for power gating in logic circuits 用于逻辑电路电源门控的高效电荷恢复逻辑
R. Subhashini, M. Geetha
{"title":"Efficient charge recovery logic for power gating in logic circuits","authors":"R. Subhashini, M. Geetha","doi":"10.1109/ICGCCEE.2014.6922299","DOIUrl":"https://doi.org/10.1109/ICGCCEE.2014.6922299","url":null,"abstract":"This paper focuses on reducing the power, area and the gate counts. In this paper, Asynchronous Coarse Grain Power gated Logic (ACGPL) has been implemented. This design comprises both the advantage of Asynchronous circuits and adiabatic logic design. Each pipeline stage in the ACGPL consists of adiabatic logic gate and handshake controller. Adiabatic logic gate is used to perform the logic function of the stage and the handshake controller is used to communicate with the neighboring devices and provide power to logic gates. In the ACGPL circuit, logic gates obtain power and turn into active only when performing useful computations, and idle logic gates are not powered and thus have negligible leakage power dissipation. The Partial Charge Reuse (PCR) mechanism can also be integrated in this paper which is used to control the charge reuse between two stages. The work involves the comparison of Asynchronous Coarse Grain Power gated Logic (ACGPL) with the Asynchronous Adiabatic Power gated Logic (AAPL). The main drawback of fine grain power gating is adding a sleep transistor to every cell that is to be turned off imposes a large area penalty, and individually gating the power of every cluster of cells creates timing issue introduced by inter-cluster voltage variation that are difficult to resolve. Most power-gating designs prefer the “coarse-grain” sleep transistor implementation than the “fine-grain” implementation which incurs large area penalty and higher PVT sensitivity. The ACPL with PCR (ACGPL-PCR) is compared with the AAPL without PCR (AAPL w/o PCR). The ACGPL-PCR is 13% better than the AAPL w/o PCR.","PeriodicalId":328137,"journal":{"name":"2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123405107","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Design of low power shift register using activity-driven optimized clock gating and run-time power gating 采用活动驱动优化时钟门控和运行时功率门控的低功耗移位寄存器设计
K. Aditya, Bharath Balaji Kotaru, B. Naik
{"title":"Design of low power shift register using activity-driven optimized clock gating and run-time power gating","authors":"K. Aditya, Bharath Balaji Kotaru, B. Naik","doi":"10.1109/ICGCCEE.2014.6922241","DOIUrl":"https://doi.org/10.1109/ICGCCEE.2014.6922241","url":null,"abstract":"This paper presents the implementation of a Four bit Serial Input Serial Output (SISO) Shift Register using combination of Activity-Driven Optimized Clock-gating (ADOC) scheme and Run Time Power Gating (RTPG). We have proposed Activity-Driven Fine-Grained CG and RTPG integration. First, we introduce an Activity-Driven Optimized Clock-Gating scheme to improve traditional XOR-based CG. It chooses only a subset of Flip-Flops to be gated selectively, then we introduce RTPG which is applied to each and every Flip Flop. The clock enable signal generated by ADOC scheme is used as the sleep signal to all the PG cells. The analysis is carried out using Tanner EDA-Industry Standard EDA design environment using 250nm technology. The simulation results show that the SISO Shift Register with ADOC & RTPG technique is 72.03% more efficient than the SISO Shift Register.","PeriodicalId":328137,"journal":{"name":"2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114202147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Grid integration of AC and DC energy resources using multi-input nine switch matrix converter 利用多输入九开关矩阵变换器实现电网交直流能源集成
V. Kandasamy, R. Manoj
{"title":"Grid integration of AC and DC energy resources using multi-input nine switch matrix converter","authors":"V. Kandasamy, R. Manoj","doi":"10.1109/ICGCCEE.2014.6922378","DOIUrl":"https://doi.org/10.1109/ICGCCEE.2014.6922378","url":null,"abstract":"High penetration of Grid by various energy resources leads to intermittent voltage and frequency variations. To smoothen out these variations and to integrate energy resources to the grid, this paper proposes a multi-input matrix converter topology to integrate the ac and dc energy resources to the grid. This matrix converter is based on the indirect matrix converter operating in the reverse boost mode. The reverse boost mode is preferred over the forward buck mode, since most of the energy resources have voltages lower than the grid voltage. The proposed matrix converter consists of nine switches providing six input terminals, there by a three phase AC source and three DC sources can be integrated to the grid. This proposed scheme guarantees sinusoidal input and output current waveforms and proper power dispatch to the grid.","PeriodicalId":328137,"journal":{"name":"2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114332580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Performance analysis of permanent magnet synchronous motor using SVPWM technique 基于SVPWM技术的永磁同步电机性能分析
G. Hemalatha, V. Chinnaiyan
{"title":"Performance analysis of permanent magnet synchronous motor using SVPWM technique","authors":"G. Hemalatha, V. Chinnaiyan","doi":"10.1109/ICGCCEE.2014.6922410","DOIUrl":"https://doi.org/10.1109/ICGCCEE.2014.6922410","url":null,"abstract":"Multilevel inversion is a power conversion strategy in which the output voltage is obtained in steps. In recent years, the multilevel inverters have drawn tremendous interest in the area of high-power medium-voltage energy control. Several modulation and control strategies have been developed or adopted for multilevel inverters including the following multilevel Sinusoidal Pulse Width Modulation (SPWM), and Space Vector Modulation. In this paper simulation of SVPWM are applied for performance analysis of PMSM using voltage source inverter. The THD and speed torque analysis for PMSM are simulated using MATLAB simulink.","PeriodicalId":328137,"journal":{"name":"2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE)","volume":"1988 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125483732","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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