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2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS)最新文献

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Integrated Variability Measurements of 28 nm FDSOI MOSFETs down to 4.2 K for Cryogenic CMOS Applications 集成可变性测量28纳米FDSOI mosfet低至4.2 K的低温CMOS应用
2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2020-05-01 DOI: 10.1109/ICMTS48187.2020.9107906
B. C. Paz, L. L. Guevel, M. Cassé, G. Billiot, G. Pillonnet, A. Jansen, S. Haendler, A. Juge, E. Vincent, P. Galy, G. Ghibaudo, M. Vinet, S. D. Franceschi, T. Meunier, F. Gaillard
{"title":"Integrated Variability Measurements of 28 nm FDSOI MOSFETs down to 4.2 K for Cryogenic CMOS Applications","authors":"B. C. Paz, L. L. Guevel, M. Cassé, G. Billiot, G. Pillonnet, A. Jansen, S. Haendler, A. Juge, E. Vincent, P. Galy, G. Ghibaudo, M. Vinet, S. D. Franceschi, T. Meunier, F. Gaillard","doi":"10.1109/ICMTS48187.2020.9107906","DOIUrl":"https://doi.org/10.1109/ICMTS48187.2020.9107906","url":null,"abstract":"Mismatch performance of 28 nm FDSOI technology is electrically characterized at low temperatures using integrated on-chip addressing for a matrix of transistors. The first statistical results ever published on FDSOI variability at 4.2 K provide valuable information for future compact transistor modeling in cryogenic circuit design. Slight increase of the threshold voltage mismatch is observed at low temperature. Nevertheless, the suppression of fluctuations in the random distribution of dopants for the fully-depleted transistor channel leads to a smaller threshold voltage variability for FDSOI at 4.2 K compared to advanced Bulk technology at room temperature.","PeriodicalId":327379,"journal":{"name":"2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115494720","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Multiscale modeling of CeO2/La2 O3 stacks for material/defect characterization 用于材料/缺陷表征的CeO2/ la2o3堆叠多尺度建模
2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2020-05-01 DOI: 10.1109/ICMTS48187.2020.9107922
B. Dianat, A. Padovani, L. Larcher
{"title":"Multiscale modeling of CeO2/La2 O3 stacks for material/defect characterization","authors":"B. Dianat, A. Padovani, L. Larcher","doi":"10.1109/ICMTS48187.2020.9107922","DOIUrl":"https://doi.org/10.1109/ICMTS48187.2020.9107922","url":null,"abstract":"Presence of defects in high-k dielectric materials will affect device’s electrical properties, thus, defect/material characterization is of great importance. We present a simulation-based methodology relying on an accurate description of charge trapping and transport that is useful to extract relevant information on material and defect characteristics. This methodology was applied to cerium oxide and lanthanum oxide high-k dielectric materials and as a result, material properties alongside defect characteristics were extracted. Consequently, main charge conduction mechanism was identified to be trap-assisted tunneling (TAT).","PeriodicalId":327379,"journal":{"name":"2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116872278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Test Structures for Noise Reduction of Fully Depleted-Silicon on Insulator p-Type Tunneling FET Using Channel Orientation 绝缘子p型隧道场效应晶体管全耗尽硅沟道定向降噪试验结构
2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2020-05-01 DOI: 10.1109/ICMTS48187.2020.9107915
Hyun-Dong Song, Hyeong-Sub Song, S. Eadi, Hyun-Woong Choi, Ga-Won Lee, H. Lee
{"title":"Test Structures for Noise Reduction of Fully Depleted-Silicon on Insulator p-Type Tunneling FET Using Channel Orientation","authors":"Hyun-Dong Song, Hyeong-Sub Song, S. Eadi, Hyun-Woong Choi, Ga-Won Lee, H. Lee","doi":"10.1109/ICMTS48187.2020.9107915","DOIUrl":"https://doi.org/10.1109/ICMTS48187.2020.9107915","url":null,"abstract":"The focus of this study was on the effect of channel orientation on tunneling field effect transistors (TFET). The proposed test patterns were rotated basic TFETs built on silicon on insulator substrates. The patterns were rotated in the (210) and (110) directions in the layout of the test setup. The DC characteristics, subthreshold slopes, and noise were measured. The results show that the on-current and subthreshold slope of the TEFTs were improved up to 8.8 times and 49.6%, respectively. The low-frequency noise was also enhanced approximately 100 times. The reason for the improvements appears to be that the reduced effective tunneling length increases tunneling probability.","PeriodicalId":327379,"journal":{"name":"2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129824381","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Extraction of Ultra-Low Contact Resistivity by End-Resistance Method 端电阻法提取超低接触电阻率
2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2020-05-01 DOI: 10.1109/ICMTS48187.2020.9107910
B. Tsui, Ya-Hsin Lee, Dong-Ying Wu, Yao-Jen Lee, Mei-Yi Li
{"title":"Extraction of Ultra-Low Contact Resistivity by End-Resistance Method","authors":"B. Tsui, Ya-Hsin Lee, Dong-Ying Wu, Yao-Jen Lee, Mei-Yi Li","doi":"10.1109/ICMTS48187.2020.9107910","DOIUrl":"https://doi.org/10.1109/ICMTS48187.2020.9107910","url":null,"abstract":"Accuracy of extracting ultra-low contact resistivity by the end-resistance method is evaluated. As the contact length becomes smaller than the transfer length, the end-resistance approaches the contact resistance, and the error decreases with the reduction of contact length and contact resistivity. The contact resistivity lower than $10^{-9}Omega-mathrm{c}mathrm{m}^{2}$ can be extracted with accuracy lower than $3times 10^{-10}Omega-mathrm{c}mathrm{m}^{2}$. This end-resistance method is verified by self-aligned transmission line model test structure. Statistic analysis of the distribution of contact resistance and the uniformity of the contact interface are also demonstrated.","PeriodicalId":327379,"journal":{"name":"2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS)","volume":"12 11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125642634","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Test structure and measurement system for characterising the electrochemical performance of nanoelectrode structures 表征纳米电极结构电化学性能的测试结构和测量系统
2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2020-05-01 DOI: 10.1109/ICMTS48187.2020.9107930
I. Schmueser, E. Blair, Ziya Isiksacan, Yifan Li, D. Corrigan, A. Stokes, J. Terry, A. Mount, A. Walton
{"title":"Test structure and measurement system for characterising the electrochemical performance of nanoelectrode structures","authors":"I. Schmueser, E. Blair, Ziya Isiksacan, Yifan Li, D. Corrigan, A. Stokes, J. Terry, A. Mount, A. Walton","doi":"10.1109/ICMTS48187.2020.9107930","DOIUrl":"https://doi.org/10.1109/ICMTS48187.2020.9107930","url":null,"abstract":"This paper presents a complete test structure and characterisation system for the evaluation of nanoelectrode technology. It integrates microfabricated nanoelectrodes for electrochemical measurements, 3D printing and surface tensionconfined microfluidics. This system exploits the inherent analytical advantages of nanoelectrodes that enables their operation with small volume samples, which has potential applications for onwafer measurements.","PeriodicalId":327379,"journal":{"name":"2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134402074","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Increased Delay Variability due to Random Telegraph Noise under Dynamic Back-gate Tuning 动态后门调谐下随机电报噪声导致的延迟变异性增加
2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2020-05-01 DOI: 10.1109/ICMTS48187.2020.9107919
Misaki Udo, Kensuke Murakami, A. Islam, H. Onodera
{"title":"Increased Delay Variability due to Random Telegraph Noise under Dynamic Back-gate Tuning","authors":"Misaki Udo, Kensuke Murakami, A. Islam, H. Onodera","doi":"10.1109/ICMTS48187.2020.9107919","DOIUrl":"https://doi.org/10.1109/ICMTS48187.2020.9107919","url":null,"abstract":"Dynamic back-gate voltage tuning is an effective technique for run-time optimization of energy consumption in an LSI. In this paper, we present our observation that variability due to RTN under back-gate voltage tuning increases significantly at low voltage operation. We investigate on the mechanism of the increase of variability and its impact on circuit performance using a ring oscillator based test chip fabricated in a 65 nm FDSOI process. Measurement results imply that additional care needs to be taken for circuits under dynamic voltage tuning.","PeriodicalId":327379,"journal":{"name":"2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115550454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A nondestructive analysis method for the frontside-release process of thermal sensors 热传感器前端释放过程的无损分析方法
2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2020-05-01 DOI: 10.1109/ICMTS48187.2020.9107917
Chao Liu, Jianyu Fu, Ying Hou, Ruiwen Liu, Qiong Zhou, Dapeng Chen
{"title":"A nondestructive analysis method for the frontside-release process of thermal sensors","authors":"Chao Liu, Jianyu Fu, Ying Hou, Ruiwen Liu, Qiong Zhou, Dapeng Chen","doi":"10.1109/ICMTS48187.2020.9107917","DOIUrl":"https://doi.org/10.1109/ICMTS48187.2020.9107917","url":null,"abstract":"Thermal sensors always have suspended structure to improve their performance. Frontside-release process is a crucial technology to fabricate suspended structure. It is of great importance to monitor the release states; however, the traditional microscope observations are destructive. In this paper, a nondestructive analysis method for the frontside-release process by analyzing the equivalent thermal conductance of thermal sensor is proposed. The measured equivalent thermal conductances of IR FPAs are consistent with the theoretical analysis results, which verifies the feasibility of this method.","PeriodicalId":327379,"journal":{"name":"2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114589141","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Application of Broadband RF Metrology to Integrated Circuit Interconnect Reliability Analyses: Monitoring Copper Interconnect Corrosion in 3D-ICs 宽带射频测量在集成电路互连可靠性分析中的应用:3d集成电路铜互连腐蚀监测
2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2020-05-01 DOI: 10.1109/ICMTS48187.2020.9107926
Papa K. Amoah, Jesus Perez, Y. Obeng
{"title":"Application of Broadband RF Metrology to Integrated Circuit Interconnect Reliability Analyses: Monitoring Copper Interconnect Corrosion in 3D-ICs","authors":"Papa K. Amoah, Jesus Perez, Y. Obeng","doi":"10.1109/ICMTS48187.2020.9107926","DOIUrl":"https://doi.org/10.1109/ICMTS48187.2020.9107926","url":null,"abstract":"In this paper we describe the application of highfrequency electromagnetic wave (in microwave frequency / radio frequency (RF in the range, i.e., 3 kHz – 300 GHz) based techniques to probe material and structural changes that occur in integrated circuits. These techniques fall under the general area of “Broadband Dielectric Spectroscopy”. In this paper, we describe corrosion of the redistribution layer (RDL), required for the implementing 3-D integrated circuits (3D-ICs), during hightemperature storage. As an illustration of our techniques, we use the RF signal loss between ports 1 and 2 on a typical vector network analyzer (i.e., RF insertion loss, S21), to monitor the oxidation of the RDL copper interconnects. We compare the RF signal loss results to the direct current-resistance that was measured simultaneously with the S21. Using electrodynamic simulations, partition the RF signal loss in corroded copper interconnects, and discuss the significance of the roughness at the air-copper oxide interface.","PeriodicalId":327379,"journal":{"name":"2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129601781","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Standardization of Specific Contact Resistivity Measurements using Transmission Line Model (TLM) 使用传输线模型(TLM)测量比接触电阻率的标准化
2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2020-05-01 DOI: 10.1109/ICMTS48187.2020.9107911
S. Grover, S. Sahu, Peng Zhang, K. Davis, S. Kurinec
{"title":"Standardization of Specific Contact Resistivity Measurements using Transmission Line Model (TLM)","authors":"S. Grover, S. Sahu, Peng Zhang, K. Davis, S. Kurinec","doi":"10.1109/ICMTS48187.2020.9107911","DOIUrl":"https://doi.org/10.1109/ICMTS48187.2020.9107911","url":null,"abstract":"The transmission line model (TLM) method is most commonly used to determine the specific contact resistivity of metal -semiconductor contacts. Inconsistencies have been observed in the literature in reported values of specific contact resistivities in devices ranging in their dimensions, e.g between those in nm-μm scaled integrated circuit devices and mm-cm scaled photovoltaic devices indicating that the contact resistivity extraction may depend on dimensions. Therefore, TLM test geometries need to be specified. This paper discusses the effect of the TLM width on extracted transfer length. The effect of pad length is investigated using the Exact Field Solution model. Linear and circular TLM test structures were created and tested on Al, NiSi/Al on p+n and n+p substrates. Specific contact resistivitiy values agree in both wide linear and circular TLM methods. However, sheet resistance values differ.","PeriodicalId":327379,"journal":{"name":"2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124011001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
OxRAM BER Scaling Trends on 4 kb Mixed-Diameter Test Vehicle 4 kb混合直径试验车上的OxRAM误码率缩放趋势
2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS) Pub Date : 2020-05-01 DOI: 10.1109/ICMTS48187.2020.9107927
J. Sandrini, C. Cagli, L. Grenouillet, N. Castellani, V. Meli, F. Gaillard
{"title":"OxRAM BER Scaling Trends on 4 kb Mixed-Diameter Test Vehicle","authors":"J. Sandrini, C. Cagli, L. Grenouillet, N. Castellani, V. Meli, F. Gaillard","doi":"10.1109/ICMTS48187.2020.9107927","DOIUrl":"https://doi.org/10.1109/ICMTS48187.2020.9107927","url":null,"abstract":"In this work we present a 4 kb OxRAM test structure which includes devices of diameter ranging from 30 nm to 170 nm. Thanks to a quasi-continuous range of cell sizes, this matrix allows to evaluate the impact of aggressive cell scaling over several performance metrics within the same test vehicle. Hereafter we study mainly the endurance results. We report how the High Resistive State increases by reducing the device size, and how this value drifts toward higher resistances differently according to the OxRAM area. Moreover, we discuss how smaller cells show a lower endurance, and how dual-bit cell configurations could compensate for these effects at the cost of doubling the dedicated area. We finally demonstrate that dual-bit cells allow a 10x reduction of the bit error rate compared to single cells of equivalent area.","PeriodicalId":327379,"journal":{"name":"2020 IEEE 33rd International Conference on Microelectronic Test Structures (ICMTS)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125855544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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