D. Grillo, Y. Fan, M. Ringle, J. Han, L. He, R. Gunshor, H. Jeon, A. Salokatve, M. Hagerott, A. Nurmikko, G. Hua, N. Ōtsuka, E. Oh, A. Ramdas
{"title":"Pseudomorphic SCH blue-green diode lasers","authors":"D. Grillo, Y. Fan, M. Ringle, J. Han, L. He, R. Gunshor, H. Jeon, A. Salokatve, M. Hagerott, A. Nurmikko, G. Hua, N. Ōtsuka, E. Oh, A. Ramdas","doi":"10.1109/DRC.1993.1009576","DOIUrl":"https://doi.org/10.1109/DRC.1993.1009576","url":null,"abstract":"D.C. Grillo, Y. Fan, M. D. Ringle, J. Han, L. He, and R.L. Gunshofl School of Electrical Engineering, Purdue University, W. Lafayette, IN 47907 H. Jeon, A. Salokatvey U Hagerott, and A.V. Nurmikko Division of Engineering, Brown University, Providence, RI 029 12 G.C. Hua, and N. Otsuka School of Materials Engineering, purdue University, W. Lafayette, IN 47907 Eunsoon Oh, and A.K. Ram& Physics Department, Purdue University, W. Lafayette, IN 47907","PeriodicalId":310841,"journal":{"name":"51st Annual Device Research Conference","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122866094","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new quantum dot transistor","authors":"Y. Wang, S. Chou","doi":"10.1109/DRC.1993.1009614","DOIUrl":"https://doi.org/10.1109/DRC.1993.1009614","url":null,"abstract":"Summary form only given. The authors propose and demonstrate a novel quantum dot transistor (QDT), which consists of a nanoscale dot-gate inside the gap of a split-gate. The dot-gate consists of an 80-nm-diameter metal dot in the middle of a 30-nm-wide metal wire; when positively biased, the gate creates a quantum box connected by two 1D wires beneath the gate. The negatively biased split-gate is used to change the Fermi level and therefore the electron concentration in the quantum box. The gates are fabricated on top of a delta -doped AlGaAs/GaAs heterostructure using electron-beam lithography followed by a lift-off of Ti/Au. As the dot-gate voltage was scanned from 0 to 160 mV with the split-gate voltage fixed at -0.5 V, four distinct oscillation peaks appeared in drain current at T=0.5 K. >","PeriodicalId":310841,"journal":{"name":"51st Annual Device Research Conference","volume":"27 22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132993551","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Ho, M. Chang, A. Sailer, P. Zampardi, D. Deakin, B. Mcdermott, R. Pierson, I. A. Higgins
{"title":"GaInP/GaAs HBTs for high-speed integrated circuit applications","authors":"W. Ho, M. Chang, A. Sailer, P. Zampardi, D. Deakin, B. Mcdermott, R. Pierson, I. A. Higgins","doi":"10.1109/DRC.1993.1009583","DOIUrl":"https://doi.org/10.1109/DRC.1993.1009583","url":null,"abstract":"","PeriodicalId":310841,"journal":{"name":"51st Annual Device Research Conference","volume":"193 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133587359","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Self aligned BM for VLSI using a new diffusion technique for shallow base formation","authors":"F. S. Johnson, G. Harris, J. Wortman, M. Ozturk","doi":"10.1109/drc.1993.1009562","DOIUrl":"https://doi.org/10.1109/drc.1993.1009562","url":null,"abstract":"Considerable effort has been invested by researchers to find a suitable base formation technique that is compatible wirh self aligned bipolar transistor m c m s . Ion implantation is plagued with channeling, particlllarly for low dose boron implants. This channeling, coupled With defect enhanced boron diffusion during post implant anneals, ultimately limits the vertical scaling of ion imphted BJTs. In narrow emitter devices, shadowing during implantation can make extrinsic base contact resistance more sensitive to emitter window over etch, exainsic base diffusion, and spacer width, resulting in a difficult control problem. Formation of base profiles by diffusion has been shown to be a desirable alternarve to ion implantation l. However, dif&xlties arise in the integration of a base diffusion source into a self aligned bipolar process. Previously reported base diffusion work has involved either the use of the sidewall spacer marerial, or the use of the emitter polysilicon as a diffusion source2. Difficulties with these diffusion methods including reduced control of base profiles, base link-up. and emitter junction depth result from unpredictable impurity diffusion and an inability to selectively remove the diffusion source following base diffusion3. The present paper describes a method of using selectively deposited and selectively removed \"polycrystalline\" SixGel-x as a diffusion source for the fabrication of narrow base self aligned BJTs. We present, for the first time, bipolar transistors built using this technique.","PeriodicalId":310841,"journal":{"name":"51st Annual Device Research Conference","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114271740","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Split-gate InAs quantum wire device operated at 80K","authors":"K. Yoh, A. Nishida, M. Inoue","doi":"10.1109/DRC.1993.1009611","DOIUrl":"https://doi.org/10.1109/DRC.1993.1009611","url":null,"abstract":"We report the electrical characteristics of InAs quantum wire devices based on deep mesa-etched structures with split gate. Quantized conductance and quantized currents have been observed at 80K for the first time. InAs quantum-effect devicesll] are potentially superior to the GaAs counterpard21 in high temperature operation for their higher low-field mobility, higher conduction band discontinuities, and higher energy separation of sublevels. However, there have only been results measured at much lower temperatures than expected for several reason^[^-^]. The heterostructure of the devices consists of 200081 of G A S layer grown on undoped GaAs substrates, 1 .Opm AlSb buffer layer, 200081 (A1.5Ga.s)Sb buffer layer, 7081 of AlSb layer, 150 a of InAs, 150 8, of (Al.gGa.g)Sb, and 100 81 of GaSb cap layer. The inserted 7081 of AlSb was intended to prevent leakage currents through (A1Ga)Sb buffer layer which becomes appreciable at high temperatures under high gate bias voltages. Device fabrication has been performed by electron beam lithography and wet chemical etching with phosphoric-asid-based etchant and photoresist developper as a selective etchant for antimonides. Ti/Au was used as non-alloyed ohmic metal which is directly deposited on InAs layer after selective etching of antimonides. A clear quantized conductance steps of three to five fold multiples of (2e2 / h) were observed at 80K with the InAs wire width of 3500A. Clear conductance steps were observed at even higher temperatures up to 120K. However, the conductance values at steps at those higher temperatures above lOOK do not agree with multiples of (2e2/ h). This is probably due to the parasitic MESFET which turns on very weakly at high temperatures. This is to our knowledge the first demonstration of 1D quantized conductance and quantized currents at 80K in any semiconductor devices. Our results clearly show the potential application of InAs quantum-effect devices which can operate at realistic temperatures.","PeriodicalId":310841,"journal":{"name":"51st Annual Device Research Conference","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125652217","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}