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2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems"最新文献

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THz Response of a JLFET Detector - Interpretation by a Resistive Mixing Theory JLFET探测器的太赫兹响应——用电阻混合理论解释
2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" Pub Date : 2019-06-01 DOI: 10.23919/MIXDES.2019.8787049
D. Tomaszewski, M. Zaborowski, J. Marczewski
{"title":"THz Response of a JLFET Detector - Interpretation by a Resistive Mixing Theory","authors":"D. Tomaszewski, M. Zaborowski, J. Marczewski","doi":"10.23919/MIXDES.2019.8787049","DOIUrl":"https://doi.org/10.23919/MIXDES.2019.8787049","url":null,"abstract":"Two models of the THz electromagnetic radiation detection using field-effect devices are presented and briefly discussed with regard to junctionless FETs as THz detectors. Due to inconsistency between a plasmonic theory and JLFET characteristics, a resistive mixing approach has been considered in a more detail and adopted for interpretation of the JLFET THz photoresponse. Fabrication of the test JLFETs and their electrical characterization are described. The detector channel conductance model and the photoresponse model have been developed in accordance with the resistive mixing theory. The modeling results are verified based on the experimental results of the THz detection using test devices.","PeriodicalId":309822,"journal":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122255636","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Clock-Free 200MS/s 10-bit Time-Interleaved SAR ADC 无时钟200MS/s 10位时间交错SAR ADC
2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" Pub Date : 2019-06-01 DOI: 10.23919/MIXDES.2019.8787144
Chien-Hung Kuo, Zih-Jyun Luo
{"title":"A Clock-Free 200MS/s 10-bit Time-Interleaved SAR ADC","authors":"Chien-Hung Kuo, Zih-Jyun Luo","doi":"10.23919/MIXDES.2019.8787144","DOIUrl":"https://doi.org/10.23919/MIXDES.2019.8787144","url":null,"abstract":"In this paper, a clock-free 200-MS/s 10-bit time-interleaved (TI) successive approximation register (SAR) analog- to-digital converter (ADC) is proposed. The presented SAR ADC can generate required clock by itself while an active signal is asserted. In the presented TI structure, two SAR ADCs are alternated with entering sample and comparison phases by the control circuit, and thus the equivalent sample rate can be doubled. The presented ADC is simulated under TSMC 90nm 1P9M CMOS process. Under a supply voltage of 1.2-V and an equivalent sampling rate of 200-MS/s, the resulted SNDR of the proposed ADC is 58.94 dB, which is equivalent to the ENOB of 9.50-bit. The simulated DNL and INL are within 0.735 / -0.404 and 0.734 / -0.552, respectively.","PeriodicalId":309822,"journal":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114690558","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Flexible HLS-Based Implementation of the Karatsuba Multiplier Targeting Homomorphic Encryption Schemes 针对同态加密方案的Karatsuba乘法器的灵活hls实现
2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" Pub Date : 2019-06-01 DOI: 10.23919/MIXDES.2019.8787132
M. J. Foster, M. Lukowiak, S. Radziszowski
{"title":"Flexible HLS-Based Implementation of the Karatsuba Multiplier Targeting Homomorphic Encryption Schemes","authors":"M. J. Foster, M. Lukowiak, S. Radziszowski","doi":"10.23919/MIXDES.2019.8787132","DOIUrl":"https://doi.org/10.23919/MIXDES.2019.8787132","url":null,"abstract":"Custom accelerators for high-precision integer arithmetic are increasingly used in compute-intensive applications, in particular homomorphic encryption schemes. This work seeks to advance a strategy for faster deployment of these accelerators using the process of high-level synthesis (HLS). Insights from existing number theory software libraries and custom hardware accelerators are used to develop a scalable implementation of Karatsuba modular polynomial multiplication. The accelerator generated from this implementation by the high-level synthesis tool Vivado HLS achieves significant speedup over the implementations available in the highly-optimized FLINT software library. This is an important first step towards a larger goal of enabling HLS-based homomorphic encryption in the cloud.","PeriodicalId":309822,"journal":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130876868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
MIXDES 2019 General Invited Papers MIXDES 2019一般邀请论文
2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" Pub Date : 2019-06-01 DOI: 10.23919/mixdes.2019.8787094
{"title":"MIXDES 2019 General Invited Papers","authors":"","doi":"10.23919/mixdes.2019.8787094","DOIUrl":"https://doi.org/10.23919/mixdes.2019.8787094","url":null,"abstract":"","PeriodicalId":309822,"journal":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132968221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Low Power, Low Chip Area, Two-stage Current-mode DAC Implemented in CMOS 130 nm Technology 一种采用CMOS 130纳米技术实现的低功耗、低片面积、两级电流模DAC
2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" Pub Date : 2019-06-01 DOI: 10.23919/MIXDES.2019.8787079
J. Dalecki, R. Dlugosz, T. Talaśka, G. Fischer
{"title":"A Low Power, Low Chip Area, Two-stage Current-mode DAC Implemented in CMOS 130 nm Technology","authors":"J. Dalecki, R. Dlugosz, T. Talaśka, G. Fischer","doi":"10.23919/MIXDES.2019.8787079","DOIUrl":"https://doi.org/10.23919/MIXDES.2019.8787079","url":null,"abstract":"The paper presents measurement results of a current mode digital-to-analog converter (DAC), implemented in the IHP CMOS 130 nm technology. The proposed two-stage DAC is composed of 10 branches, so theoretically 10 bits of the resolution may be obtained. The circuit is reconfigurable. This means that if smaller resolutions are sufficient, the user may select the branches that are used in data conversion. The measurements were carried-out using a programmable measurement setup, designed for this purpose, equipped with precise current sources. Five samples of the prototype chip were tested. The measurements were carried out for different values of particular parameters. The circuit has been designed as one of the components of a Successive Approximation Register (SAR) analog-to-digital converter (ADC). However, it can be used as a separate block also for other purposes. The chip area of the overall ADC does not exceed 0.01 mm2, with the DAC occupying 60 % of this area.","PeriodicalId":309822,"journal":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","volume":"117 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133774149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Medical Applications 医学应用
2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" Pub Date : 2019-06-01 DOI: 10.23919/mixdes.2019.8787053
{"title":"Medical Applications","authors":"","doi":"10.23919/mixdes.2019.8787053","DOIUrl":"https://doi.org/10.23919/mixdes.2019.8787053","url":null,"abstract":"","PeriodicalId":309822,"journal":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133789313","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
FPGA-based Data Processing in the Neutron-Sensitive Beam Loss Monitoring System for the ESS Linac 基于fpga的ESS直线加速器中子敏感束流损耗监测系统数据处理
2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" Pub Date : 2019-06-01 DOI: 10.23919/MIXDES.2019.8787166
G. Jablonski, I. Kittelmann, W. Jalmuzna, R. Kiełbik, W. Cichalewski, K. Rosengren, T. Shea, F. Alves, V. Grishin, T. Papaevangelou, L. Segui, C. Zamantzas
{"title":"FPGA-based Data Processing in the Neutron-Sensitive Beam Loss Monitoring System for the ESS Linac","authors":"G. Jablonski, I. Kittelmann, W. Jalmuzna, R. Kiełbik, W. Cichalewski, K. Rosengren, T. Shea, F. Alves, V. Grishin, T. Papaevangelou, L. Segui, C. Zamantzas","doi":"10.23919/MIXDES.2019.8787166","DOIUrl":"https://doi.org/10.23919/MIXDES.2019.8787166","url":null,"abstract":"The European Spallation Source (ESS), which is currently under construction, will be a neutron source based on 5 MW, 2 GeV superconducting proton linac. Among other beam instrumentation systems, this high intensity linac requires a Beam Loss Monitoring (BLM) system. An important function of the BLM system is to protect the linac from beam-induced damage by detecting unacceptably high beam loss and promptly inhibiting beam production. In addition to protection functionality, the system is expected to provide the means to monitor the beam losses during all modes of operation with the aim to avoid excessive machine activation. This paper focuses on the FPGA implementation of the real-time data processing in the nBLM system and presents preliminary result of a prototype system installed at LINAC4 at CERN.","PeriodicalId":309822,"journal":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133854569","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Terahertz Technologies and Applications 太赫兹技术与应用
2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" Pub Date : 2019-06-01 DOI: 10.23919/MIXDES.2019.8787160
T. Skotnicki, W. Knap
{"title":"Terahertz Technologies and Applications","authors":"T. Skotnicki, W. Knap","doi":"10.23919/MIXDES.2019.8787160","DOIUrl":"https://doi.org/10.23919/MIXDES.2019.8787160","url":null,"abstract":"We present background and potential of THz radiation that these recent days gains a lot of interest coming from both scientific as well as industrial circles. THz radiation emission and detection still puzzles physicists and promises innovative commercial applications. We will overview THz generation and detection challenges. We will also present examples of already working application and draw some future perspectives.","PeriodicalId":309822,"journal":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133745964","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Reducing the Bipolar Junction Transistor Vbe Non-Linearity 降低双极结晶体管Vbe非线性
2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" Pub Date : 2019-06-01 DOI: 10.23919/MIXDES.2019.8787201
Viorel Bucur, Gabriel Banarie, Stefan Marinca, M. Bodea
{"title":"Reducing the Bipolar Junction Transistor Vbe Non-Linearity","authors":"Viorel Bucur, Gabriel Banarie, Stefan Marinca, M. Bodea","doi":"10.23919/MIXDES.2019.8787201","DOIUrl":"https://doi.org/10.23919/MIXDES.2019.8787201","url":null,"abstract":"There is an increasing demand for high-performance, low-cost, small footprint and reliable silicon-based temperature sensors. Most of the high precision temperature sensors are based on Bipolar Junction Transistor (BJT). The baseemitter voltage of a BJT can be a good temperature sensor if the device to device distribution is compensated and its inherent nonlinearity is reduced. This paper proposes simple, low cost, high precision, low noise, temperature sensor. The base-emitter voltage variation and its non-linearity will be discussed, and the corresponding trimming will be presented.","PeriodicalId":309822,"journal":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","volume":"492 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122752060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Modelling a Half-bridge de-de Converter Including the IGBT Module with Thermal Phenomena Taken into Account 考虑热现象的含IGBT模块的半桥变换器建模
2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" Pub Date : 2019-06-01 DOI: 10.23919/MIXDES.2019.8787176
P. Górecki, K. Górecki
{"title":"Modelling a Half-bridge de-de Converter Including the IGBT Module with Thermal Phenomena Taken into Account","authors":"P. Górecki, K. Górecki","doi":"10.23919/MIXDES.2019.8787176","DOIUrl":"https://doi.org/10.23919/MIXDES.2019.8787176","url":null,"abstract":"In the paper the problem of modelling characteristics of half-bridge dc-dc converters containing IGBT modules with thermal phenomena taken into account is considered. The form of the used electrothermal compact model of the IGBT module and the investigated converter are described. Some results of measurements and calculations of characteristics of the considered converter are shown and discussed. Particularly, temperature distribution in the IGBT module in different operating conditions of the considered converter are analysed.","PeriodicalId":309822,"journal":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116349490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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