{"title":"Battery supported PV Module integrated Cascaded High Gain Boost Converter for telecom tower power supply","authors":"V. Verma, Vandana Arora","doi":"10.1109/ICPEICES.2016.7853715","DOIUrl":"https://doi.org/10.1109/ICPEICES.2016.7853715","url":null,"abstract":"For areas, which are unapproachable to the grid, powering the telecom towers becomes a difficult task due to both environmental and system issues. Thus an environment-friendly, low maintenance and cost-effective electricity generation is the necessity of the time. PV fed system with battery as back-up which typically suits these applications. This paper proposes a PV Module integrated Cascaded High Gain Boost Converter (MICHGBC) which can do MPPT and boosts the voltage upto a usable level hybridized with battery to support Base Tran receiver Systems (BTS) load. The control scheme evacuates the maximum power during PV generation amidst insolation change presenting a slave current source, whereas, the battery maintains the output voltage and act as Master. The system sizing is presented in the paper, which decides the capacity of the panels to ensure the adequate charging of the batteries during the day time and battery size to consume the supply of power to BTS load. The performance of the system is evaluated under MATLAB/Simulink environment. Presented simulation results show close conformity with design and sizing done & also validates the effectiveness of the proposed control employed for operations of MICHGBC.","PeriodicalId":305942,"journal":{"name":"2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121930578","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and development of Tilted Single Axis and Azimuth-Altitude Dual Axis Solar Tracking systems","authors":"Shashwati Ray, A. Tripathi","doi":"10.1109/ICPEICES.2016.7853190","DOIUrl":"https://doi.org/10.1109/ICPEICES.2016.7853190","url":null,"abstract":"The green energy also called the renewable energy, has gained much attention nowadays. Among the renewable energy solutions, solar energy is the very vital source that can be used to generate power. Electricity from the sun can be converted through photovoltaic (PV) module. The efficiency of solar module depends on sun intensity, if the intensity is more then efficiency is more. Since the position of sun continuously changes throughout the day, the intensity of sun rays is not uniform on PV module. So, for getting more sun rays on PV module solar tracker plays a much vital role. A solar tracker is a device for operating a solar photovoltaic panel, especially in solar cell applications and requires high degree of accuracy to ensure that the concentrated sunlight is dedicated precisely on to the power device. This paper describes in detail about the design, development and fabrication of two Prototype Solar Tracking Systems mounted with a single-axis and dual-axis solar tracking controllers to generate 10.3 volts, 1.5 watts capable of charging mobile batteries. The rays from the sun should fall perpendicularly onto the solar panels to maximize the capture of the rays and this is done by pointing the solar panels towards the sun and following its path across the sky. The solar tracking systems - Tilted Single Axis Tracker (TSAT) and Azimuth-Altitude Dual Axis Tracker (AADAT) are designed, implemented and experimentally tested. The design details of TSAT and AADAT are described which detect the sunlight using Light Dependent Resistor (LDR) sensors. The control circuit for the systems is based on Atmega8 Microcontroller which is programmed to detect the sunlight through the LDR sensors and then actuate the DC geared motor using L293D motor driver to position the solar panel where it can receive the maximum sunlight.","PeriodicalId":305942,"journal":{"name":"2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133907937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shubhangi Khobragade, A. Tiwari, C. Patil, Vikram D. Narke
{"title":"Automatic detection of major lung diseases using Chest Radiographs and classification by feed-forward artificial neural network","authors":"Shubhangi Khobragade, A. Tiwari, C. Patil, Vikram D. Narke","doi":"10.1109/ICPEICES.2016.7853683","DOIUrl":"https://doi.org/10.1109/ICPEICES.2016.7853683","url":null,"abstract":"Chest Radiograph is the preliminary requirement for the identification of lung diseases. Tuberculosis; pneumonia and lung cancer these lung diseases are major health threat. According to recent survey; which was given by WHO; rate of people dying due to late diagnosis of lung diseases is in millions. Early diagnosis of these diseases can curb mortality rate. This paper proposes lung segmentation; lung feature extraction and it's classification using artificial neural network technique for the detection of lung diseases such as TB; lung cancer and pneumonia. We have used the simple image processing techniques like intensity based method and discontinuity based method to detect lung boundaries. Statistical and geometrical features are extracted. Image classification using feed forward and back propagation neural network to detect major lung diseases.","PeriodicalId":305942,"journal":{"name":"2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131787597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of low power subthreshold linear feedback shift registers","authors":"K. Gupta, P. Sharma, N. Pandey","doi":"10.1109/ICPEICES.2016.7853593","DOIUrl":"https://doi.org/10.1109/ICPEICES.2016.7853593","url":null,"abstract":"This paper focuses on the design of linear feedback shift register (LFSR) in subthreshold regime. An LFSR requires D flip flops and exclusive OR (XOR) gates for its realization. Four different LFSR architectures based on different types of circuits for D flip flop and XOR gate are put forward. The first architecture uses true-single phase clock (TSPC) D flip-flop and static CMOS XOR gate, the second employs TSPC based D flip-flop and Transmission Gate based XOR gate. The other two architectures use transmission gate based D flip flop and differ in the use XOR gate (static CMOS or transmission gate). The functionality of the proposed architectures is verified through SPICE simulations using 0.18 µm TSMC CMOS technology parameters. The performance of the proposed architectures is compared on the basis of highest frequency and power consumption. It is found that the LFSR employing TSPC based D flip flop are capable of achieving highest operating frequency and satisfy the low-power concern of the VLSI chips.","PeriodicalId":305942,"journal":{"name":"2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131888522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Current mode universal filter employing operational transconductance amplifier and third generation current conveyor","authors":"T. S. Arora, Manish Gupta, Soumya Gupta","doi":"10.1109/ICPEICES.2016.7853305","DOIUrl":"https://doi.org/10.1109/ICPEICES.2016.7853305","url":null,"abstract":"This paper proposes a new universal filter employing two output operational transconductance amplifier and a third generation current conveyor. The proposed current-mode filter circuit is designed with minimum number of active devices as well as minimum number of passive elements. All the passive elements employed are grounded in nature making it a better choice for integrated circuit implementation. This filter circuit provides low pass, high pass, band pass, band reject and all pass responses simultaneously without changing any hardware configuration. The availability of explicit current output makes this circuit efficient for use as higher order filter without using any additional buffers. The universal biquad also has a feature of independent tunability of quality factor and bandwidth. PSPICE simulation has been done to test and verify the theoretical results.","PeriodicalId":305942,"journal":{"name":"2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129372203","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An efficient approach for optimal placement of DG unit in Radial Distribution System","authors":"Preeti Kumawat, Sarfaraz Nawaz, Ankush Tandon","doi":"10.1109/ICPEICES.2016.7853510","DOIUrl":"https://doi.org/10.1109/ICPEICES.2016.7853510","url":null,"abstract":"The evolution of Distributed Generation (DG) brings new changes to the traditional power system. Distribution Generation plays an essential function in distribution system by meliorating the systems reliability, diminution in power losses and intensifying the voltage profile. This paper proposes an analytical approach to discern the optimal size and optimal locale of DG entities in reconfigured distribution network to mitigate the losses. The DG penetration level is also taken into consideration. The propound method is piloted on the standard IEEE 33-bus test system at three different load levels. The result acquired exhibits the upswing in voltage profile and the diminution in real power losses.","PeriodicalId":305942,"journal":{"name":"2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130879736","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Implementation of PPC-SSR as final control element and interfacing of PLC with LabVIEW using Modbus in two tank non interacting level control system","authors":"S. A. Dixit, A. Jain","doi":"10.1109/ICPEICES.2016.7853095","DOIUrl":"https://doi.org/10.1109/ICPEICES.2016.7853095","url":null,"abstract":"This paper demonstrates the capabilities of software intelligence against hardware intelligence, real-time data acquisition using third party instrument like PLC and PPC-SSR as final control element. The experimental setup is a two tank non-interacting level control system and from these tanks; level of second cylindrical tank is to be control using a feedback control loop i.e. single analog level control loop. In LabVIEW software, Modbus serial communication is used for developing an online real-time data acquisition. In the project model, software based PID is used instead of hardware based PID which has equal controlling capabilities, where primary control element is pressure transmitter for level measurement, PID module of LabVIEW as a controller, PLC as an interfacing media between LabVIEW software and system hardware and Phase angle control-SSR as final control element for controlling the flowrate of centrifugal lifting pump. In addition to that this paper will also touch upon the implementation issues. Moreover this setup portrays the industrial setup with future scope of domestic use.","PeriodicalId":305942,"journal":{"name":"2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132442624","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and implementation of a robust fault detection mechanism for EHV lines","authors":"S. Hareesh, P. Raja, M. P. Selvan","doi":"10.1109/ICPEICES.2016.7853200","DOIUrl":"https://doi.org/10.1109/ICPEICES.2016.7853200","url":null,"abstract":"This paper presents a robust fault detection mechanism in EHV lines by using Wavelet transform and FFT analysis. db6 is chosen as mother wavelet since it is best one to analyze the transients during faults and load switching. The simulated results are validated with the experimental results. For fault detection 2nd harmonic spectral component and energy difference of the consecutive windows are used as deciding parameters for fault detection. The algorithm is robust such that it won't issue trip signal for the load changes. But in the case of any fault in the system (LG fault in this paper) both second harmonic and difference of energy of consecutive windows exceeds threshold value and issues trip signal. The status of the transmission network is monitored in a mobile application developed for android.","PeriodicalId":305942,"journal":{"name":"2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124196601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Dissolved Gas Analysis of power transformer using K-means and Support Vector Machine","authors":"Amita Singh, Gaurav Upadhyay","doi":"10.1109/ICPEICES.2016.7853614","DOIUrl":"https://doi.org/10.1109/ICPEICES.2016.7853614","url":null,"abstract":"The power transformer is ranked as one of the most important and expensive components in the electricity sector. However, the sudden failure of the power transformer places the system into serious or critical conditions. This paper utilizes artificial intelligence techniques to detect and predict transformer faults based on Dissolved Gas Analysis method and presents an intelligent methodology KMSVM (k-means and support vector machine) based on optimization technique to properly monitor, diagnose and predict the faults in the power transformer. Furthermore, the proposed technique helps in finding an effective and reliable monitoring technique to address transformer conditions at a much faster rate and hence minimizes the challenges.","PeriodicalId":305942,"journal":{"name":"2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115131569","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Comparative analysis of 8 bit Carry Skip Adder using CMOS and PTL techniques with conventional MOSFET at 32 nanometer regime","authors":"P. P. Patil, A. A. Hatkar","doi":"10.1109/ICPEICES.2016.7853414","DOIUrl":"https://doi.org/10.1109/ICPEICES.2016.7853414","url":null,"abstract":"The Carry Skip Adder (CSKA) is identified by a better efficiency in the trade off between operating speed and power dissipation, as it has a very low power-delay product, near to that of a carry-look ahead adder (CLA). A CSKA consists of blocks of full adder combined together, whose schematic (i.e., combination of full adders per block) mainly affects the overall operating speed of carry skip adder. These FA blocks are interconnected through 2∶1 multiplexers. Worst case delay can be reduced with different techniques which has been proposed for full adders, this paper provides an optimization technique only for the case of constant block size to improve the speed performance. The addition operations will result in sum value and carry value. In general, addition is a process which involves two numbers which are added and carry will be generated. The addition operations will result in sum value and carry value. In this paper, the performance parameters of delay, average power, PDP and EDP are compared at different technology node.","PeriodicalId":305942,"journal":{"name":"2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116922304","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}