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2006 IEEE Hot Chips 18 Symposium (HCS)最新文献

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Collaborative innovation; a new lever in information technology development 协同创新;信息技术发展的新杠杆
2006 IEEE Hot Chips 18 Symposium (HCS) Pub Date : 2006-08-01 DOI: 10.1109/HOTCHIPS.2006.7477866
B. Meyerson
{"title":"Collaborative innovation; a new lever in information technology development","authors":"B. Meyerson","doi":"10.1109/HOTCHIPS.2006.7477866","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477866","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on collaborative innovation and its impact on information technology development. Some of the specific topics discussed include: the economics of collaborative technology development; CMOS scaling and processing capabilities; scaling performance, 2003 versus 2006; performance evaluation of processors with and without scaling; design considerations; power and thermal management; and key factors that will impact innovation in this field.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124471889","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
ARM996HS™ the first licensable, clockless 32-bit processor core ARM996HS™是第一个可授权的无时钟32位处理器核心
2006 IEEE Hot Chips 18 Symposium (HCS) Pub Date : 2006-08-01 DOI: 10.1109/HOTCHIPS.2006.7477862
A. Bink, R. York
{"title":"ARM996HS™ the first licensable, clockless 32-bit processor core","authors":"A. Bink, R. York","doi":"10.1109/HOTCHIPS.2006.7477862","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477862","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on the ARM-Handshake Solutions partnership. Some of the specific topics discussed include: the specifics of the partnership which involved the joint development of the ARM core implementations; potential application domains; ARM embedded processors and measured power efficiency; a description of Handshake technology; and an overview of joint development technologies; and power processing capabilities.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123863029","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The next generation 65-nm FPGA 下一代65nm FPGA
2006 IEEE Hot Chips 18 Symposium (HCS) Pub Date : 2006-08-01 DOI: 10.1109/HOTCHIPS.2006.7477750
S. Douglass, K. Vissers, P. Alfke
{"title":"The next generation 65-nm FPGA","authors":"S. Douglass, K. Vissers, P. Alfke","doi":"10.1109/HOTCHIPS.2006.7477750","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477750","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on Xilinx's Virtex-5 family of 65-nm FPGA products. Some of the specific topics discussed include: a description of Virtex special features, system specifications, and technology innovations; improved I/O performance; benchmarking Virtex-5, LUT6 systems; the new Microblaze features in Virtex-5; and new areas of technological development.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"114 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123466725","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Hot chips 18 industry panel: Who owns the living room? 热点18行业座谈:谁拥有客厅?
2006 IEEE Hot Chips 18 Symposium (HCS) Pub Date : 2006-08-01 DOI: 10.1109/HOTCHIPS.2006.7477856
James Akiyama
{"title":"Hot chips 18 industry panel: Who owns the living room?","authors":"James Akiyama","doi":"10.1109/HOTCHIPS.2006.7477856","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477856","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on a panel discussion that examined the home entertainment and mobile computing market. Some of the specific topics discussed include: key trends in home automation and home entertainment; major consumer products and communications/digital systems that support these prducts and services; the market for digital entertainment; snd platforms supported;","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127947501","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Hardware and applications of AsAP: An asynchronous array of simple processors AsAP的硬件和应用:简单处理器的异步阵列
2006 IEEE Hot Chips 18 Symposium (HCS) Pub Date : 2006-08-01 DOI: 10.1109/HOTCHIPS.2006.7477855
B. Baas, Zhiyi Yu, Michael J. Meeuwsen, Omar Sattari, Ryan W. Apperson, Eric W. Work, Jeremy W. Webb, Michael A. Lai, Daniel Gurman, Chi Chen, Jason Cheung, D. Truong, T. Mohsenin
{"title":"Hardware and applications of AsAP: An asynchronous array of simple processors","authors":"B. Baas, Zhiyi Yu, Michael J. Meeuwsen, Omar Sattari, Ryan W. Apperson, Eric W. Work, Jeremy W. Webb, Michael A. Lai, Daniel Gurman, Chi Chen, Jason Cheung, D. Truong, T. Mohsenin","doi":"10.1109/HOTCHIPS.2006.7477855","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477855","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on hardware and applications of a the AsAP chip processor. Some of the specific topics discussed include: the target applications and objectives of the AsAP processor; key features and system specifications; major processing capabilities; and programming and applications supported.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124381778","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
TeraOPS hardware: A new massively-parallel MIMD computing fabric IC TeraOPS硬件:一种新的大规模并行MIMD计算结构集成电路
2006 IEEE Hot Chips 18 Symposium (HCS) Pub Date : 2006-08-01 DOI: 10.1109/HOTCHIPS.2006.7477853
A. Jones, M. Butts
{"title":"TeraOPS hardware: A new massively-parallel MIMD computing fabric IC","authors":"A. Jones, M. Butts","doi":"10.1109/HOTCHIPS.2006.7477853","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477853","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on Ambric's TeraOPS hardware, a parallel MIMD computing fabric for integrated circuits. Some of the specific topics discussed include: the special features and architecture of TeraOPS; deployment and applications for its use; processing capabilities; facilities for object programming; programming model and tools; and new areas of technological development.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127654866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
Niagara-2: A highly threaded server-on-a-chip Niagara-2:芯片上的高线程服务器
2006 IEEE Hot Chips 18 Symposium (HCS) Pub Date : 2006-08-01 DOI: 10.1109/HOTCHIPS.2006.7477874
G. Grohoski
{"title":"Niagara-2: A highly threaded server-on-a-chip","authors":"G. Grohoski","doi":"10.1109/HOTCHIPS.2006.7477874","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477874","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on Niagara-2, a highly threaded server-on-a-chip from Sun Microsystems. Some of the specific topics discussed include: special features and applications supported by Niagara-2; the specifications of the Sparc core, its execution units, power capabilities, and RAS facilities. Also reports on new areas of technological development.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127346396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 65
HOTCHIPS 2006 heterogeneous multiprocessing for efficient multi-standard high definition video decoding HOTCHIPS 2006异构多处理高效多标准高清视频解码
2006 IEEE Hot Chips 18 Symposium (HCS) Pub Date : 1900-01-01 DOI: 10.1109/hotchips.2006.7477743
{"title":"HOTCHIPS 2006 heterogeneous multiprocessing for efficient multi-standard high definition video decoding","authors":"","doi":"10.1109/hotchips.2006.7477743","DOIUrl":"https://doi.org/10.1109/hotchips.2006.7477743","url":null,"abstract":"","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124467444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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