{"title":"Niagara-2:芯片上的高线程服务器","authors":"G. Grohoski","doi":"10.1109/HOTCHIPS.2006.7477874","DOIUrl":null,"url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on Niagara-2, a highly threaded server-on-a-chip from Sun Microsystems. Some of the specific topics discussed include: special features and applications supported by Niagara-2; the specifications of the Sparc core, its execution units, power capabilities, and RAS facilities. Also reports on new areas of technological development.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"65","resultStr":"{\"title\":\"Niagara-2: A highly threaded server-on-a-chip\",\"authors\":\"G. Grohoski\",\"doi\":\"10.1109/HOTCHIPS.2006.7477874\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article consists of a collection of slides from the author's conference presentation on Niagara-2, a highly threaded server-on-a-chip from Sun Microsystems. Some of the specific topics discussed include: special features and applications supported by Niagara-2; the specifications of the Sparc core, its execution units, power capabilities, and RAS facilities. Also reports on new areas of technological development.\",\"PeriodicalId\":302249,\"journal\":{\"name\":\"2006 IEEE Hot Chips 18 Symposium (HCS)\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"65\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE Hot Chips 18 Symposium (HCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HOTCHIPS.2006.7477874\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Hot Chips 18 Symposium (HCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOTCHIPS.2006.7477874","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This article consists of a collection of slides from the author's conference presentation on Niagara-2, a highly threaded server-on-a-chip from Sun Microsystems. Some of the specific topics discussed include: special features and applications supported by Niagara-2; the specifications of the Sparc core, its execution units, power capabilities, and RAS facilities. Also reports on new areas of technological development.