{"title":"Bulk CMOS technology for SOC","authors":"C. H. Diaz","doi":"10.1109/IWJT.2002.1225213","DOIUrl":"https://doi.org/10.1109/IWJT.2002.1225213","url":null,"abstract":"CMOS technology scaling has come to a point whereby traditional assumptions that warranted a fair degree of de-coupling between process development and circuit/system design do not hold. One specific example relates to chip standby leakage. Today's most advanced transistor designs push gate dielectric thickness into a regime where direct tunneling currents are no longer negligible. Meanwhile, the portable electronics sector had become a key industry driver demanding VLSI circuits with ever increasing functionality-performance needs while maintaining tight controls on power consumption. To conciliate the scaling-driven technology fundamental limitations with the industry evolution requirements, flexible CMOS technologies and tighter interaction between process development and circuit/system design are needed to efficiently realize Systems on a Chip (SoC). This paper discusses aspects of bulk CMOS SoC technology definition and front-end scaling trends.","PeriodicalId":300554,"journal":{"name":"Extended Abstracts of the Third International Workshop on Junction Technology, 2002. IWJT.","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127730621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}