Bulk CMOS technology for SOC

Abstract

CMOS technology scaling has come to a point whereby traditional assumptions that warranted a fair degree of de-coupling between process development and circuit/system design do not hold. One specific example relates to chip standby leakage. Today's most advanced transistor designs push gate dielectric thickness into a regime where direct tunneling currents are no longer negligible. Meanwhile, the portable electronics sector had become a key industry driver demanding VLSI circuits with ever increasing functionality-performance needs while maintaining tight controls on power consumption. To conciliate the scaling-driven technology fundamental limitations with the industry evolution requirements, flexible CMOS technologies and tighter interaction between process development and circuit/system design are needed to efficiently realize Systems on a Chip (SoC). This paper discusses aspects of bulk CMOS SoC technology definition and front-end scaling trends.