{"title":"Study on metal tag identification impedance characteristics based on eddy testing","authors":"Hongguang Xu, Di Song, Yin Zhao","doi":"10.1109/ICASID.2016.7873926","DOIUrl":"https://doi.org/10.1109/ICASID.2016.7873926","url":null,"abstract":"A crack is definitely harmful in metallic components, yet it is maybe useful in a metal barcode label (MBL) application which is a special barcode made up of tiny notches and spaces sculptured in the surface of the un-supporting parts of a metallic component. The obvious different requirement from the eddy current testing (ECT) applied in a non-destructive evaluating (NDE) is that an ECT must distinguish elements (notches and spaces) with high resolution for the high barcode density in a MBL. To achieve the optimal detection performance, the electromagnetic signals induced by MBLs must be studied under various conditions. In this paper, the impedance change of coils with various geometries and electromagnetic (EM) parameters has been given caused by the elements with various geometries and EM parameters, based on the ECT technique. Also the coverage is investigated, in which an element can effect on the coil impedance. The resolution of the MBL is defined and the characteristics of the coil impedance change caused by a MBL containing multiple elements have been analyzed.","PeriodicalId":294777,"journal":{"name":"2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114443913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A scalable and efficient hardware architecture for Montgomery modular division in dual field","authors":"Suwen Yi, Wei Li, Z. Dai","doi":"10.1109/ICASID.2016.7873892","DOIUrl":"https://doi.org/10.1109/ICASID.2016.7873892","url":null,"abstract":"As the most complicated and critical operation in finite field, a scalable and efficient implementation for modular division is very necessary and meaningful for elliptic curve cryptography. In this paper, an improved Montgomery modular division algorithm is presented depending on Kaliski's Montgomery inversion, which can reduce the execution cycles significantly compared with the traditional modular division. Then an excellent hardware architecture for Montgomery modular division is designed based on the improved Montgomery modular division algorithm. To optimize the execution time of this Montgomery modular division further, a fully pipelining strategy is adopted in our design. This design is scalable within 576-bit in dual field. Synthesized in 0.18µm CMOS technology, our design can perform the modular division algorithm occupied 43k gates in 17.5µs over GF(p576) and 12.6µs over GF(2576).","PeriodicalId":294777,"journal":{"name":"2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114695867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High speed generation of pseudonoise sequences","authors":"Anjin Peng","doi":"10.1109/ICASID.2016.7873888","DOIUrl":"https://doi.org/10.1109/ICASID.2016.7873888","url":null,"abstract":"This paper proposes a type of interpolated Bitfilter for producing high speed pseudonoise (PN) sequences. The interpolated Bitfilter consists of two parallel polyphase Bitfilters, two expanders and one delay element. Through the expanders and delay element, the m-sequences produced by the two parallel polyphase Bitfilters are time-interleaved, thus the PN-sequences generated by the interpolated Bitfilter are obtained. The design example is given, and its result has revealed that the interpolated Bitfilter is able to generate higher speed PN-sequences whose period length is identical with that of the m-sequences generated by parallel polyphase Bitfilters. Due to the concurrent computations of implementation structure, this class of Bitfilter which produces faster PN-sequences can be realized easily using relatively lower cost circuit. It is obvious that this type of Bitfilter is efficient and helpful in generating PN-sequences.","PeriodicalId":294777,"journal":{"name":"2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127704284","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An improved denoising method for ultrasonic echo of non-destructive evaluation","authors":"Fan Ping, Liu Xinbao","doi":"10.1109/ICASID.2016.7873891","DOIUrl":"https://doi.org/10.1109/ICASID.2016.7873891","url":null,"abstract":"As a widely used non-destructive evaluation (NDE), ultrasonic testing utilizes the echo wave to evaluate the material damage and degradation. However, there exists a lot of unwanted noise, which makes the detection of small faults difficult. In order to achieve the good detection performance of non-destructive evaluation, an improved denoising method of ultrasonic echo was proposed in present study. Firstly, the echo wave of ultrasonic testing is decomposed with the wavelet packet transform (WPT). Subsequently, the energy and entropy parameters of wavelet packets are calculated, respectively. Based on the analysis of their statistical properties, the threshold for the signal reconstruction packets is determined. Besides, by the simulation experiments on two cracks at different locations in a metal plate, the denoising performance of the present method using two popular wavelet functions of sym4 and db4 are investigated and compared with other conventional methods. All these experiment results show that the better denoise performance can be achieved with this proposed method especially when the signal noise ratio (SNR) is smaller than 10dB.","PeriodicalId":294777,"journal":{"name":"2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124185838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jun Huang, F. Ruan, Ming Su, Xiaohong Yang, Shunli Yao, Junhua Zhang
{"title":"Analysis of orthogonal frequency division multiplexing (OFDM) technology in wireless communication process","authors":"Jun Huang, F. Ruan, Ming Su, Xiaohong Yang, Shunli Yao, Junhua Zhang","doi":"10.1109/ICASID.2016.7873931","DOIUrl":"https://doi.org/10.1109/ICASID.2016.7873931","url":null,"abstract":"The rapid development of wireless communication technologye provide users with more convenience but also accompanied serious interference problem in wireless communication. Resolution of interference problem become much important for communication process. Improvement of transmission performance can be reached with technology orthogonal frequency division multiplexing (OFDM). Loading transmission in signal is realized with FFT and IFFT technology in MATLAB. Orthogonal subcarriers ensure signal transmission without distortion. Simulation results show that string and conversion reduce multi-path effect, inter-symbol interference (ISI) decreased with extending symbol period, achieved efficient and reliable transmission of information signals in wireless communication channel.","PeriodicalId":294777,"journal":{"name":"2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122649433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 180nm CMOS three stage feedforward compensation op-amp with linearity improvement technique for active RC LPF","authors":"Wenxin Wu, Tingting Mo, Zhijian Lu","doi":"10.1109/ICASID.2016.7873924","DOIUrl":"https://doi.org/10.1109/ICASID.2016.7873924","url":null,"abstract":"The nonlinearity analysis of the full differential operational amplifier (op-amp) and Cascade System are introduced. A multistage op-amp with feedforward compensation (FFC) and linearity improvement technique circuit is designed. The proposed op-amp utilizes a current-reusing, split path technology. A 10MHz bandwidth 4th-order, Chebyshev-I, ladder active-RC LPF employing the op-amp in this paper is simulated and optimized with the guideline of the nonlinearity analysis. The optimized in-band IIP3 of the LPF can achieve 50.2dBm in a test two-tone input signal at 4.5MHz and 4.6MHz while consuming 14.76mW from a 1.8V supply in 180nm CMOS technology.","PeriodicalId":294777,"journal":{"name":"2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115171339","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Research of antenna selection based on binary cat swarm optimization","authors":"Shumei Li, J. Ma, Mingjie Zhuang, Yue Chen","doi":"10.1109/ICASID.2016.7873933","DOIUrl":"https://doi.org/10.1109/ICASID.2016.7873933","url":null,"abstract":"Cat swarm optimization (CSO) is a kind of intelligent algorithm to mimic the behavior of cat, the binary CSO (BCSO) is a binary version. Based on the characteristic of BCSO's tracking mode and search mode to the global optimal solution, this paper proposes a new antenna selection algorithm applying BCSO. By the application of the arithmetic model of BCSO and the two kinds of patterns of behavior, this algorithm fused BCSO to the process antenna selection, and focused on transforming the selective sequence of antennas to the process of cat swarm optimization. At the same time, this paper offers the velocity and position updating formula of the cats under different modes, and designed the step of iteration to solve the problem. The simulation results show that the algorithm is highly effective and accurate in antenna selection.","PeriodicalId":294777,"journal":{"name":"2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131717549","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Achieving the secrecy capacity on strong security using LT code with polar code pre-coding","authors":"Guangyu Yang, Mingjie Zhuang","doi":"10.1109/ICASID.2016.7873916","DOIUrl":"https://doi.org/10.1109/ICASID.2016.7873916","url":null,"abstract":"Coset coding is often used in the study of the physical layer security based on wiretap channel model. As almost every secure coding schemes using coset codes need a precise prediction of the channel state information (CSI), they are much more difficult to implement. To solve this problem, we propose a concatenated coding scheme combined of polar code and fountain code in wiretap channel model on binary memoryless erasure channels, achieving the strong security condition without the need for CSI. Unlike ordinary secure coding, we add fountain code after the coset encoding, making the code become a rateless code. Firstly, we illustrate the details of our scheme, and prove its security using information theory analysis method. Then, we give the result of our coding scheme against finite code length with limited security in practice. It shows our scheme works well when the code length is big enough. At last, two possible main reasons are discussed for the loss of coding rate.","PeriodicalId":294777,"journal":{"name":"2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133379844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reconfigurable design for NBF based on optimal area utilization model","authors":"Wang Zhouchuang, D. Zibin, Li Wei, Chuan Xin","doi":"10.1109/ICASID.2016.7873920","DOIUrl":"https://doi.org/10.1109/ICASID.2016.7873920","url":null,"abstract":"In this paper, to solve the problem that there are shortage of united frameworks or the frameworks do not match very well with the process for NBFs in sequence cryptograms, we analyzed the processing of sequence cryptograms, describe the abstract model and devise a reconfigurable framework for the existing NBFs. In particular, in order to get excellent area utilization, we firstly study on the proposed model about the influence of LUT (look-up table) and cluster on FPGA (field programmable gate array), which is widely accepted by industry. With the features of sequence cryptograms in mind, we focus on the critical component named ACLM (adaptive cryptographic logic module) in proposed structure after analyzing the effect of LUT size and cluster size on the area utilization. Having researched the specific features of NBFs, we determine the LUT size, ACLM size and ACLM input ports are 4, 4 and 10. Finally, our results show that the designed framework can clock the data path at 241MHz, and the area utilization of ACLM exceeds 90% mostly and can even achieve 100% for some NBFs or cryptograms.","PeriodicalId":294777,"journal":{"name":"2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122351249","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Weilin Xu, Di Wu, C. Zhu, Jihai Duan, Baolin Wei, Xueming Wei, Fabi Zhang
{"title":"Behavioral modeling to circuit design steps of an injection locked CDR in 0.18µm-CMOS","authors":"Weilin Xu, Di Wu, C. Zhu, Jihai Duan, Baolin Wei, Xueming Wei, Fabi Zhang","doi":"10.1109/ICASID.2016.7873925","DOIUrl":"https://doi.org/10.1109/ICASID.2016.7873925","url":null,"abstract":"In this paper the design, simulation and measurement procedure of injection locked clock and data recovery(CDR) circuit is discussed. The non-idealities of the CDR circuit such as power supply noise and lock detection are modeled behaviorally using Verilog-A. The required CDR specifications can be extracted in a very short period of simulation time with the designed behavioral model. The designed CDR features with full speed, dual loop, coarse and fine tuning and injection locked technology. The proposed CDR is fabricated with SMIC 0.18um 1P6M process and consumes 36mW from a single 1.8 V supply. Measured results show that the 250Mbps input NRZ signal could be correctly recovered with 2ps root-mean-square jitter.","PeriodicalId":294777,"journal":{"name":"2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116451068","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}