Reconfigurable design for NBF based on optimal area utilization model

Abstract

In this paper, to solve the problem that there are shortage of united frameworks or the frameworks do not match very well with the process for NBFs in sequence cryptograms, we analyzed the processing of sequence cryptograms, describe the abstract model and devise a reconfigurable framework for the existing NBFs. In particular, in order to get excellent area utilization, we firstly study on the proposed model about the influence of LUT (look-up table) and cluster on FPGA (field programmable gate array), which is widely accepted by industry. With the features of sequence cryptograms in mind, we focus on the critical component named ACLM (adaptive cryptographic logic module) in proposed structure after analyzing the effect of LUT size and cluster size on the area utilization. Having researched the specific features of NBFs, we determine the LUT size, ACLM size and ACLM input ports are 4, 4 and 10. Finally, our results show that the designed framework can clock the data path at 241MHz, and the area utilization of ACLM exceeds 90% mostly and can even achieve 100% for some NBFs or cryptograms.