2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)最新文献

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Ultrawide Bandgap Nitride Semiconductor Heterojunction Field Effect Transistors 超宽带隙氮化半导体异质结场效应晶体管
W. Lu
{"title":"Ultrawide Bandgap Nitride Semiconductor Heterojunction Field Effect Transistors","authors":"W. Lu","doi":"10.1109/BCICTS53451.2022.10051751","DOIUrl":"https://doi.org/10.1109/BCICTS53451.2022.10051751","url":null,"abstract":"This paper presents an overview on nitride based ultrawide bandgap semiconductor heterojunction (AlxGa1-xN/AlyGa1-yN, AlN/GaN, ScAlN/GaN) field effect transistors. Devices built on these heterojunction structures have high current drive capability due to the high sheet carrier density induced by the large conduction band offsets and strong polarization. To modulate the high sheet charge density and manage the electrical field for a high breakdown voltage, dielectric engineering and finFET structures are implemented. The challenge and methods to form ohmic contacts on these heterojunction structures are discussed. Finally an overlook on device engineering is discussed on how further device performances can be enhanced than what has been demonstrated so far.","PeriodicalId":289208,"journal":{"name":"2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134511452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 220-294 GHz Power Amplifier with 10-dBm Psat and 2.2% PAE in 250-nm InP DHBT 一个220-294 GHz功率放大器,10 dbm Psat和2.2% PAE在250纳米InP DHBT
Teruo Jyo, H. Hamada, M. Nagatani, H. Wakita, Ibrahim Abdo, M. Mutoh, Y. Shiratori, K. Okada, A. Shirane, Hiroyuki Takahashi
{"title":"A 220-294 GHz Power Amplifier with 10-dBm Psat and 2.2% PAE in 250-nm InP DHBT","authors":"Teruo Jyo, H. Hamada, M. Nagatani, H. Wakita, Ibrahim Abdo, M. Mutoh, Y. Shiratori, K. Okada, A. Shirane, Hiroyuki Takahashi","doi":"10.1109/BCICTS53451.2022.10051755","DOIUrl":"https://doi.org/10.1109/BCICTS53451.2022.10051755","url":null,"abstract":"We designed and fabricated a 300-GHz-band power amplifier (PA) with a wide bandwidth, high output power, and high power-added efficiency (PAE) in in-house 250-nm indium phosphide (InP) double heterojunction bipolar transistor (DHBT) technology having an fmax of 480 GHz. To obtain high PAE, we investigated an optimization method for designing the PA at an optimum point in the trade-off between the output power and DC power consumption (PDC). We proposed a low-loss T-junction power combiner with impedance convertors to maximize the output power and the PAE. Furthermore, we used dense through substrate vias (TSVs) to stabilize the ground and to suppress the oscillation to ensure a high gain and high PAE. The fabricated PA achieved a -3 dB bandwidth of 74 GHz from 220 GHz to 294 GHz, saturation power (Psat) of 10.6 dBm, and PAE of 2.24%.","PeriodicalId":289208,"journal":{"name":"2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"171 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134094150","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A 1-W/mm2, 140-GHz SiGe HBT Power Amplifier using Optimized Embedding Techniques 采用优化嵌入技术的1w /mm2, 140 ghz SiGe HBT功率放大器
Everett O'Malley, Jim Buckwalter
{"title":"A 1-W/mm2, 140-GHz SiGe HBT Power Amplifier using Optimized Embedding Techniques","authors":"Everett O'Malley, Jim Buckwalter","doi":"10.1109/BCICTS53451.2022.10051692","DOIUrl":"https://doi.org/10.1109/BCICTS53451.2022.10051692","url":null,"abstract":"We present a design technique for high-power density with stacked devices in power amplifiers at 140-GHz. A theory of embedding networks that simultaneously match multiple stacked transistors subject to loadline constraints is demonstrated using two prototype networks. A 90-nm silicon-germanium power amplifier is presented at D-band (140 GHz) using a single stage PA and a two-stage, power-combined PA. The PAs demonstrate peak power-added efficiency (PAE) of 10.8% and a power density of 990mW/mm2. To our knowledge, this is the highest D-band power density for a silicon process.","PeriodicalId":289208,"journal":{"name":"2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121047222","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
MVSG GaN-HEMT Model: Approach to Simulate Fringing Field Capacitances, Gate Current De-biasing, and Charge Trapping Effects MVSG GaN-HEMT模型:模拟边缘场电容、栅极电流去偏和电荷俘获效应的方法
Ryan Fang, Dylan Ma, U. Radhakrishna, Lan Wei
{"title":"MVSG GaN-HEMT Model: Approach to Simulate Fringing Field Capacitances, Gate Current De-biasing, and Charge Trapping Effects","authors":"Ryan Fang, Dylan Ma, U. Radhakrishna, Lan Wei","doi":"10.1109/BCICTS53451.2022.10051741","DOIUrl":"https://doi.org/10.1109/BCICTS53451.2022.10051741","url":null,"abstract":"This paper presents new features of the latest MIT Virtual Source GaN-HEMT (MVSG) model covering fringing field capacitances, gate current de-biasing, and charge trapping effects. These model augmentations capture physical device phenomena observed in industry-devices in a robust, computationally efficient fashion. The features enhance simulation accuracy in both HV and RF-circuit applications and is included in the upcoming standard release of the industry-standard MVSG Verilog-A code. Contributions of this work are: (i) Bias-dependent fringing fields that can describe non-linear device-capacitance behavior due to charge-depletion in drain-access region beyond the last field-plate (FP). Previously, this effect was modeled using a \"dummy\" non-physical field-plate. (ii) Assignment of gate-source and gate-drain Schottky diodes to internal source/drain-nodes before and after FPs. Charge-depletion in FPs at high VDS results in transitions in both gate-current (IG) and capacitance (CGG) which can be accurately modeled using the new approach. (iii) Enhanced charge-trapping effects that include drain-lag and gate-lag effects, both capture and emission time-constants and their temperature-dependencies. The model is calibrated against measured transient pulsing data and accurately describes dynamic saturation-current (IDSat), knee-voltage (VKnee) and output-conductance (gDS). New parameters are added in the model to capture the effects and can be extracted from independent measurements.","PeriodicalId":289208,"journal":{"name":"2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132654315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
The Load-Modulated Linearizer: A Technique for Intermodulation Cancellation in PA Systems 负载调制线性器:扩音系统中互调消除技术
Anton N. Atanasov, Wasam R. A. Mukhtar Ahmad, M. S. O. Alink, F. V. van Vliet
{"title":"The Load-Modulated Linearizer: A Technique for Intermodulation Cancellation in PA Systems","authors":"Anton N. Atanasov, Wasam R. A. Mukhtar Ahmad, M. S. O. Alink, F. V. van Vliet","doi":"10.1109/BCICTS53451.2022.10051742","DOIUrl":"https://doi.org/10.1109/BCICTS53451.2022.10051742","url":null,"abstract":"A novel application utilizing the load-modulated balanced amplifier (LMBA) principle to actively absorb individual out-of-band intermodulation distortion (IMD) components at the output of a power amplifier operating in high compression is presented. The system is able to correct AM/AM distortion by absorbing the unwanted IMD components using active load-modulation. We achieve IMD suppression of about 30dB, while the main PA operates at the P3dB compression point and above, with a phase and amplitude error tolerance of ±2 degrees and ±0.5 dB, respectively. It retains the power conservation properties of the LMBA and achieves linearization at a very low power and complexity penalty.","PeriodicalId":289208,"journal":{"name":"2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121483515","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Challenges and Potential of N-polar GaN HEMT for beyond 5G Wireless Network 超5G无线网络n极GaN HEMT的挑战与潜力
Shigeki Yoshida, K. Makiyama, A. Hayasaka, I. Makabe, K. Nakata
{"title":"Challenges and Potential of N-polar GaN HEMT for beyond 5G Wireless Network","authors":"Shigeki Yoshida, K. Makiyama, A. Hayasaka, I. Makabe, K. Nakata","doi":"10.1109/BCICTS53451.2022.10051701","DOIUrl":"https://doi.org/10.1109/BCICTS53451.2022.10051701","url":null,"abstract":"This paper describes the advantages of N-polar GaN HEMT by comparing device characteristics with those of Ga-polar HEMT. The N-polar GaN HEMT epi-structure, which was designed for RF devices, was grown on 4-inch semi-insulating SiC substrate by MOCVD with smooth surface morphology and low sheet resistance non-uniformity of 1.2%. This paper reports, for the first time, N-polar HEMTs which were fabricated using the same 4-inch wafer process facilities and our manufacturing expertise for commercial Ga-polar GaN HEMTs. The reported N-polar GaN HEMT achieved drain current density of 1.74 A/mm and drain conductance of less than 40 mS/mm. Both of these are superior to Ga-polar GaN HEMT. Using hafnium oxide-based dielectrics, high-k gate insulators were developed and achieved a relative permittivity of 17. N-polar GaN HEMTs with these high-k gate insulators were fabricated and these devices reached a sufficient level to be used for high frequency RF power amplifiers. These results indicate that N-polar GaN HEMTs will be the key technology for next generation high power and high frequency power amplifiers.","PeriodicalId":289208,"journal":{"name":"2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129087826","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Improved Electrical Reliability and Performance Enhancements in SiGe HBTs Using Dummy BEOL Metal Layers 使用虚拟BEOL金属层改善SiGe hbt的电气可靠性和性能
Nelson E. Sepulveda-Ramos, Jeffrey W. Teng, Harrison P. Lee, J. Cressler
{"title":"Improved Electrical Reliability and Performance Enhancements in SiGe HBTs Using Dummy BEOL Metal Layers","authors":"Nelson E. Sepulveda-Ramos, Jeffrey W. Teng, Harrison P. Lee, J. Cressler","doi":"10.1109/BCICTS53451.2022.10051752","DOIUrl":"https://doi.org/10.1109/BCICTS53451.2022.10051752","url":null,"abstract":"The present work demonstrates, for the first time, the impact of BEOL design on the electrical reliability of SiGe HBTs. Mixed-mode and high-current stress were performed for four different SiGe HBT variants with different levels of dummy metal layers. The avalanche multiplication factor was found to be insensitive to changes in the BEOL, and thus the classical mixed-mode degradation was similar across all BEOL variants. Meanwhile, high-current stress showed that adding more dummy metal layers alleviated the current gain and base current density degradation by 30% and 100%, respectively. Both the mechanical stress and temperature differences due to additional dummy metal layers were investigated using TCAD simulations. It was found that reduction in temperature due to reduced thermal resistance from dummy metal layers overwhelms stress-driven increases in the Auger generation rate. The present study sheds light on the impacts to reliability when adding dummy metal layers above devices, as well as the potential of intentional dummy BEOL design as a performance enhancement technique for circuit design in a manner that incurs no additional concern for electrical reliability.","PeriodicalId":289208,"journal":{"name":"2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"61 235 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125958518","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 13 GHz PA with Amplitude Modulation for Entanglement Generation in Multi-Qubit 171Yb+ Gates of an Ion-Trapped Quantum Computer 离子阱量子计算机多量子位171Yb+门中纠缠产生的调幅13ghz放大器
Péter Tóth, Lasse Cordes, V. Issakov
{"title":"A 13 GHz PA with Amplitude Modulation for Entanglement Generation in Multi-Qubit 171Yb+ Gates of an Ion-Trapped Quantum Computer","authors":"Péter Tóth, Lasse Cordes, V. Issakov","doi":"10.1109/BCICTS53451.2022.10051697","DOIUrl":"https://doi.org/10.1109/BCICTS53451.2022.10051697","url":null,"abstract":"This work presents a power amplifier (PA) for microwave-driven entanglement operation in ion-trap-based Ytterbium qubit gates. The design is optimized for a center frequency of 13 GHz with a 3 dB bandwidth of 6 GHz thereby fulfilling the requirements to drive the 12.6 GHz hyperfine transisiton in the electronic ground state of a 171Yb+ ion. The PA achieves a saturated output power of 14 dBm and a gain of 20 dB at the center frequency. Due to a tunable operating point it is possible to realize a power-efficient amplitude modulation allowing for a qubit-gate fidelity improvement. The presented circuit achieves a measured power-added-efficiency (PAE) of 28 %. Due to maintaining an electrically stable operation during operation-point changes, this circuit is highly suitable for analyzing the effect of various pulse envelopes on the gate fidelity. The proposed circuit is silicon-proven and fabricated in a 0.13 µm SiGe BiCMOS process covering a core area of only 0.14 mm2.","PeriodicalId":289208,"journal":{"name":"2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"284 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123097559","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Characterization and Modeling of Thermal Coupling in Multi-Finger InP DHBTs 多指InP DHBTs热耦合特性与建模
Markus Müller, T. Nardmann, Maximilian Froitzheim, M. Schröter
{"title":"Characterization and Modeling of Thermal Coupling in Multi-Finger InP DHBTs","authors":"Markus Müller, T. Nardmann, Maximilian Froitzheim, M. Schröter","doi":"10.1109/BCICTS53451.2022.10051728","DOIUrl":"https://doi.org/10.1109/BCICTS53451.2022.10051728","url":null,"abstract":"The thermal coupling between emitter fingers in a state-of-the-art InP DHBT process technology is characterized using a novel test-structure. It is discussed how thermal coupling impacts multi-finger transistors. A simple model describing the coupling effect is incorporated into a scalable HICUM/L2 model. It is shown how the model can be utilized to design thermally optimized InP HBT structures so as to accurately reproduce characteristics of a multi-finger transistor.","PeriodicalId":289208,"journal":{"name":"2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123378271","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Numerical Optimization of On-Resistance and Transconductance in Depletion-Mode and Enhancement-Mode GaN HEMTs 耗尽模式和增强模式GaN hemt导通电阻和跨导的数值优化
I. Berdalovic, M. Poljak, T. Suligoj
{"title":"Numerical Optimization of On-Resistance and Transconductance in Depletion-Mode and Enhancement-Mode GaN HEMTs","authors":"I. Berdalovic, M. Poljak, T. Suligoj","doi":"10.1109/BCICTS53451.2022.10051747","DOIUrl":"https://doi.org/10.1109/BCICTS53451.2022.10051747","url":null,"abstract":"In this paper, we use a numerical mobility modeling framework for GaN-based high electron mobility transistors (HEMTs) to examine the dependence of important design parameters such as on-resistance and transconductance on the device structure. The model is calibrated by matching previously published experimental mobility data for a depletion-mode AlGaN/AlN/GaN/AlGaN double-heterostructure (DH) HEMT to within ±10%. The structural parameters of the device are optimized and a minimum on-resistance of 541 Ω/□ is achieved with a mole fraction of 0.36 and thickness of 14 nm for the AlGaN barrier. A p-GaN cap is added to the initial structure to achieve enhancement-mode operation, and the impact of cap and barrier thickness on threshold voltage and on-resistance is discussed. The transconductance of enhancement-mode devices at an overvoltage of 8 V is improved from 1.58 to 2.59 mS/□ by simultaneously reducing the thickness of the p-GaN and AlGaN layers, thus increasing the gate capacitance while maintaining the same threshold voltage and on-resistance. The optimization procedure allows to obtain similar design parameters for the enhancement-mode HEMT as for the initial depletion-mode structure, proving that the addition of the p-GaN cap is an efficient way to increase the threshold voltage without compromising device performance.","PeriodicalId":289208,"journal":{"name":"2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115013202","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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