{"title":"Implementation of programmable logic array using SET-CMOS hybrid approach","authors":"A. Ghosh, A. Jain, S. Sarkar","doi":"10.1109/ICE-CCN.2013.6528559","DOIUrl":"https://doi.org/10.1109/ICE-CCN.2013.6528559","url":null,"abstract":"The layout of programmable logic array allows for a large number of logic functions to be synthesized in the sum of product canonical form. This paper presents the design and implementation of programmable logic array (PLA) with SET-CMOS hybrid technology. The PLA is represented as a three layered architecture where each of the layer is implemented applying the hybrid approach. As here, we are using two different technologies namely single electron tunneling technology and CMOS technology, so the logical operation of the designed PLA is governed by the combination of two complementary technologies. We have verified the proper functionality of the designed circuit by simulating it using Tanner spice simulator.","PeriodicalId":286830,"journal":{"name":"2013 IEEE International Conference ON Emerging Trends in Computing, Communication and Nanotechnology (ICECCN)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121417954","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reduced complexity analysis for ML MIMO systems","authors":"R. Jothikumar","doi":"10.1109/ICE-CCN.2013.6528529","DOIUrl":"https://doi.org/10.1109/ICE-CCN.2013.6528529","url":null,"abstract":"In this paper, we propose an uncomplicated Maximum Likelihood (ML) metric along with the breadth first tree search algorithm, to reduce the number of operations required and number of nodes to be processed while decoding the transmitted symbols of MIMO (Multiple Input Multiple Output) systems. Using the similarity property of the QAM (Quadrature Amplitude Modulation) the complexity of the system is reduced without compromising the performance.","PeriodicalId":286830,"journal":{"name":"2013 IEEE International Conference ON Emerging Trends in Computing, Communication and Nanotechnology (ICECCN)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126608814","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and development of maximum power point tracking in wind power optimization using fuzzy PLL controller","authors":"T. Govindaraj, S. Ravi, P. Balakrishnan","doi":"10.1109/ICE-CCN.2013.6528528","DOIUrl":"https://doi.org/10.1109/ICE-CCN.2013.6528528","url":null,"abstract":"This paper proposes an improved maximum power point tracking (MPPT) method for Wind system using a fuzzy with PLL algorithm. The main advantage of the method is the reduction of the steady state oscillation (to practically zero) once the maximum power point (MPP) is located. Furthermore, the proposed method has the ability to track the MPP for extreme environmental condition, e.g. large fluctuations of isolation and partial shading condition. The algorithm is simple and can be computed very rapidly. To evaluate the effectiveness of the proposed method, MATLAB simulations are carried out under very challenging conditions, namely step changes in irradiance, step changes in load and partial shading of wind array. The proposed method in simulation shows it is efficient than the conventional controllers in terms of achieving maximum wind power generation effectively with steady state output compared to other conventional controllers.","PeriodicalId":286830,"journal":{"name":"2013 IEEE International Conference ON Emerging Trends in Computing, Communication and Nanotechnology (ICECCN)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125781218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Implementation and comparison of effective area efficient architectures for CSLA","authors":"R. Priya, J. S. Kumar","doi":"10.1109/ICE-CCN.2013.6528510","DOIUrl":"https://doi.org/10.1109/ICE-CCN.2013.6528510","url":null,"abstract":"In the design of Integrated circuit area occupancy plays a vital role because of increasing the necessity of portable systems. Carry Select Adder (CSLA) is a fast adder used in data-processing processors for performing fast arithmetic functions. From the structure of the CSLA, the scope is reducing the area of CSLA based on the efficient gate-level modification. In this paper 16 bit, 32 bit, 64 bit and 128 bit Regular Linear CSLA, Modified Linear CSLA, Regular Square-root CSLA (SQRT CSLA) and Modified SQRT CSLA architectures have been developed and compared. However, the Regular CSLA is still area-consuming due to the dual Ripple-Carry Adder (RCA) structure. For reducing area, the CSLA can be implemented by using a single RCA and an add-one circuit instead of using dual RCA. Comparing the Regular Linear CSLA with Regular SQRT CSLA, the Regular SQRT CSLA has reduced area as well as comparing the Modified Linear CSLA with Modified SQRT CSLA; the Modified SQRT CSLA has reduced area. The results and analysis show that the Modified Linear CSLA and Modified SQRT CSLA provide better outcomes than the Regular Linear CSLA and Regular SQRT CSLA respectively. This project was aimed for implementing high performance optimized FPGA architecture. Modelsim 10.0c is used for simulating the CSLA and synthesized using Xilinx PlanAhead13.4. Then the implementation is done in Virtex5 FPGA Kit.","PeriodicalId":286830,"journal":{"name":"2013 IEEE International Conference ON Emerging Trends in Computing, Communication and Nanotechnology (ICECCN)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128156722","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Loop parallelization and pipelining implementation of AES algorithm using OpenMP and FPGA","authors":"J. Banu, M. Vanitha, J. Vaideeswaran, S. Subha","doi":"10.1109/ICE-CCN.2013.6528547","DOIUrl":"https://doi.org/10.1109/ICE-CCN.2013.6528547","url":null,"abstract":"AES (Advanced Encryption Standard) is an effective encryption algorithm in applications like Internet to provide cyber security and also in smart cards. Multi-core and Field-Programmable Gate Arrays (FPGAs) are the promising solution for the performance up gradation. The main focus of this paper is to increase the throughput of the AES algorithm through hardware and software techniques. Various approaches for efficient hardware implementation of the AES algorithm is based on architectural optimization techniques like pipelining, loop unrolling and iterative design. Here we have adopted pipelining technique to increase the speed of the algorithm by processing multiple rounds simultaneously. Software parallelization techniques with OpenMP standard is used to increase the speedup of the algorithm compared to its sequential version. A pipelined architecture AES-128 core is implemented using Xilinx xc5vlx110t-1 device can achieve a throughput of 31.25Gbps which is more effective than previous ASIC implementations. By implementing the AES algorithm using OpenMP we achieve speed up of 1.08 in the dual core processor.","PeriodicalId":286830,"journal":{"name":"2013 IEEE International Conference ON Emerging Trends in Computing, Communication and Nanotechnology (ICECCN)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130576216","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Bandwidth guarantees in multihop Wireless Mesh Network using hybrid routing","authors":"R. Jayapradha, A. Ajitha","doi":"10.1109/ICE-CCN.2013.6528523","DOIUrl":"https://doi.org/10.1109/ICE-CCN.2013.6528523","url":null,"abstract":"Wireless Mesh Network (WMN) has became the important wireless technology to provide the internet application to the remote areas. WMN have to provide the quality-of service for the internet access in the remote and metropolitan areas. This paper deals with the problem of finding the maximum bandwidth path from source to destination that supports the QoS in WMN. Interference among the links is the greater issue in finding optimum path. The path weight is calculated, that finds the maximum bandwidth of the path. The consistency requirement is satisfy by the hybrid multihop routing protocol based on this path weight. The consistency property sates that each node make the consistent packet forwarding decision in the predefined path. Result of this work find and route the data in the path that provide maximum throughput and minimum time delay.","PeriodicalId":286830,"journal":{"name":"2013 IEEE International Conference ON Emerging Trends in Computing, Communication and Nanotechnology (ICECCN)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132751471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Incremental learning algorithm for face recognition using DCT","authors":"D. Sisodia, L. Singh, S. Sisodia","doi":"10.1109/ICE-CCN.2013.6528509","DOIUrl":"https://doi.org/10.1109/ICE-CCN.2013.6528509","url":null,"abstract":"Face Recognition System developed in this research work is based on newly invented Incremental Support Vector Machines for face recognition in which DCT (Discrete Cosine Transform) is used for the purpose to reduce the dimensionality of face space. Low frequency DCT coefficients are used to generate local features. Selected feature vectors are then fed into ISVM to classify the input data as a face ID or not. Incremental Support Vector Machine is used to learn data incrementally from previous stored data and also to avoid large training time and memory consumption for face recognition. In this approach ORL (Olivetti Research Laboratory)[28] face database is used for performing experiments and the results has proved that not only the training time but also the updating time taken by Incremental SVM is very less. Using this technique an accurate face recognition system is developed and tested and the performance found is efficient. The biggest advantage of using the ISVM is that it not only decreases the training time and updating time but also improves the classification accuracy rate to 100%.","PeriodicalId":286830,"journal":{"name":"2013 IEEE International Conference ON Emerging Trends in Computing, Communication and Nanotechnology (ICECCN)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130993573","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Detection of abnormalities in retinal images","authors":"T. Yamuna, S. Maheswari","doi":"10.1109/ICE-CCN.2013.6528500","DOIUrl":"https://doi.org/10.1109/ICE-CCN.2013.6528500","url":null,"abstract":"The human eye is the organ which gives us the sense of sight. The eye reflects or emits the light to interpret the shapes, colors, and dimensions of objects in the world. Retina places a major role in the human vision system. The retina gets affected by long-term dietetic mellitus called Diabetic Retinopathy (Microaneurysm). Earlier detection of these abnormalities will prevent the vision loss. This work aims to detect such abnormalities in the retinal image and to classify them based on their severity. To detect the abnormality, two preprocessing and one candidate extraction method are proposed and various stages of abnormalities are classified based on the features like area, mean, standard deviation, entropy etc. Adaptive Neuro Fuzzy Inference System (ANFIS) is an effective tool used for effective screening of retinal abnormalities. ANFIS is used to classify the retinal images as normal, mild, severe depending on their severity.","PeriodicalId":286830,"journal":{"name":"2013 IEEE International Conference ON Emerging Trends in Computing, Communication and Nanotechnology (ICECCN)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122403576","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Achieving green computing by effective utilization of cloud resources using a cloud OS","authors":"N. Naik, K. Kanagala, J. P. Veigas","doi":"10.1109/ICE-CCN.2013.6528590","DOIUrl":"https://doi.org/10.1109/ICE-CCN.2013.6528590","url":null,"abstract":"Cloud Computing is composed of amalgamation of different elements and solutions, namely operating systems running on a single virtualized computing environment, middleware layers that attempt to combine physical and virtualized resources from multiple operating systems, and specialized application engines that influence a substantial benefit of the cloud service provider (e.g. Amazon). In this platform, huge amount of resources are present in the cloud and this resources need to be managed effectively. When this resources are united, major problems are incorporated into the system as well as the application due to compatibility and consistency constraints, hence there does not exist a unified processing environment to carry out this operation. In this paper, we demonstrate the importance of cloud OS known as virtual distributed operating system that binds together this cloud resources in a single-unified processing environment that helps to manage the cloud resources in a flexible and accessible approach henceforth enhancing the systems performance. Several cloud OS are available to bridge the gap between this cloud resources. The experiment is being performed on several existing platforms that allows the user to access this resources with a user friendly GUI. By making use of a cloud OS the overhead in handling the cloud resources by the running machine can be successfully reduced for a particular cloud user hence directing towards efficient use of systems resources and contributing towards the features of green computing.","PeriodicalId":286830,"journal":{"name":"2013 IEEE International Conference ON Emerging Trends in Computing, Communication and Nanotechnology (ICECCN)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121150676","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Multi-target tracking in mobility sensor networks using Ant Colony Optimization","authors":"S. B. Kumar, G. Myilsamy","doi":"10.1109/ICE-CCN.2013.6528522","DOIUrl":"https://doi.org/10.1109/ICE-CCN.2013.6528522","url":null,"abstract":"Target tracking is one of the applications of Mobile Sensor Networks. Mobility management is the important parameter that affects the performance and lifetime of the Mobile sensor networks. So we need to manage the mobility in a controlled manner. Existing methods attempt to achieve these requirements for controlled mobility single target tracking only. In this paper, we propose a Multi-Target Tracking method using Ant Colony Optimization to satisfy these requirements. In this proposed method, targets current position values are estimated at every time step. Then, predicting the next position value of each target by using the previous time-step estimated values. Interval Analysis is used for estimation and prediction of position values. Then the proposed method consists of moving the mobile node in an optimal way to cover Multi-Target. The optimal path is been chosen by Ant Colony Optimization technique. Simulations results shows the advantages of the proposed method compared to single target tracking methods.","PeriodicalId":286830,"journal":{"name":"2013 IEEE International Conference ON Emerging Trends in Computing, Communication and Nanotechnology (ICECCN)","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124594459","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}