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Proceedings. 34th International Symposium on Multiple-Valued Logic最新文献

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Spectra generation for fixed-polarity Reed-Muller transform over GF(5) GF(5)上固定极性Reed-Muller变换的谱生成
Proceedings. 34th International Symposium on Multiple-Valued Logic Pub Date : 2004-05-22 DOI: 10.1109/ISMVL.2004.1319938
B. Falkowski, C. C. Lozano, S. Rahardja
{"title":"Spectra generation for fixed-polarity Reed-Muller transform over GF(5)","authors":"B. Falkowski, C. C. Lozano, S. Rahardja","doi":"10.1109/ISMVL.2004.1319938","DOIUrl":"https://doi.org/10.1109/ISMVL.2004.1319938","url":null,"abstract":"This paper examines several basic methods that can be used to obtain the fixed-polarity Reed-Muller (FPRM) spectra for functions defined over Galois field (5) (GF(5)). The fundamental concepts of the methods are discussed and their computational costs in terms of addition and multiplication numbers are presented. The experimental results for 5-valued functions, using the methods described in this paper, are also listed and compared with each other.","PeriodicalId":285497,"journal":{"name":"Proceedings. 34th International Symposium on Multiple-Valued Logic","volume":"126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122488443","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Quantum circuit synthesis using classes of GF(3) reversible fast spectral transforms 利用 GF(3) 可逆快速频谱变换类进行量子电路合成
Proceedings. 34th International Symposium on Multiple-Valued Logic Pub Date : 2004-05-19 DOI: 10.1109/ISMVL.2004.1319925
A. Al-Rabadi
{"title":"Quantum circuit synthesis using classes of GF(3) reversible fast spectral transforms","authors":"A. Al-Rabadi","doi":"10.1109/ISMVL.2004.1319925","DOIUrl":"https://doi.org/10.1109/ISMVL.2004.1319925","url":null,"abstract":"Novel quantum circuit synthesis, using reversible Davio expansions, is introduced. The new method uses two planes to synthesize the quantum circuits: (1) a reversible butterfly circuit plane; and (2) a plane of quantum gates to perform additions and multiplications. Since the reduction of power consumption is a major requirement for circuit design of future technologies, such as in quantum circuits, the main features of several future technologies must include reversibility, and thus the new synthesis method, using reversible butterfly circuits, can play an important role in the synthesis of circuits that consume minimal power.","PeriodicalId":285497,"journal":{"name":"Proceedings. 34th International Symposium on Multiple-Valued Logic","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120850410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Hard vs. soft: the central question of pre-fabricated silicon 硬与软:预制硅的核心问题
Proceedings. 34th International Symposium on Multiple-Valued Logic Pub Date : 2004-05-19 DOI: 10.1109/ISMVL.2004.1319911
Jonathan Rose
{"title":"Hard vs. soft: the central question of pre-fabricated silicon","authors":"Jonathan Rose","doi":"10.1109/ISMVL.2004.1319911","DOIUrl":"https://doi.org/10.1109/ISMVL.2004.1319911","url":null,"abstract":"It is possible to foresee the day when prefabricated, programmable devices such as Field-Programmable Gate Arrays (FPGAs) are used as the dominant silicon implementation medium. This paper will explore the forces that already drive in that direction and the architecture, CAD and circuit enhancement opportunities that may also help to make it happen. We will focus on the central question in FPGA architecture: what hard, dedicated circuit structures should be included on the FPGA? These structures are contrasted with the regular soft fabric, which can always be used to implement logic functions, but with less efficiency and performance. We will discuss the trade-offs involved, and the requirements for CAD tools and algorithms needed to support these hard structures. An interesting specific case that will be addressed is whether processors should be implemented in hard or soft form. Finally we will look an alternative: enhancing the capability of the soft fabric itself.","PeriodicalId":285497,"journal":{"name":"Proceedings. 34th International Symposium on Multiple-Valued Logic","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122061334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
On the optimisation of Reed-Muller expressions Reed-Muller表达式的优化研究
Proceedings. 34th International Symposium on Multiple-Valued Logic Pub Date : 2004-05-19 DOI: 10.1109/ISMVL.2004.1319937
K. Adams, J. McGregor
{"title":"On the optimisation of Reed-Muller expressions","authors":"K. Adams, J. McGregor","doi":"10.1109/ISMVL.2004.1319937","DOIUrl":"https://doi.org/10.1109/ISMVL.2004.1319937","url":null,"abstract":"The choice of a set of basis functions with which to represent Reed-Muller canonical forms makes less and less difference, on average, to the efficiency, as measured by the number of non-zero terms, in which they can be expressed, as the number of variables in the function increases. This is because the possible efficiency gain itself declines exponentially in the general case, independently of the basis used. We explain why this is so, and using an integrated set of software tools, including a genetic algorithm, we provide supporting evidence of the phenomenon.","PeriodicalId":285497,"journal":{"name":"Proceedings. 34th International Symposium on Multiple-Valued Logic","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123838512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Multiple-valued multiple-rail encoding scheme for low-power asynchronous communication 低功耗异步通信的多值多轨编码方案
Proceedings. 34th International Symposium on Multiple-Valued Logic Pub Date : 2004-05-19 DOI: 10.1109/ISMVL.2004.1319914
Tomohiro Takahashi, T. Hanyu
{"title":"Multiple-valued multiple-rail encoding scheme for low-power asynchronous communication","authors":"Tomohiro Takahashi, T. Hanyu","doi":"10.1109/ISMVL.2004.1319914","DOIUrl":"https://doi.org/10.1109/ISMVL.2004.1319914","url":null,"abstract":"This paper presents a multiple-valued multiple-rail encoding scheme for low-power asynchronous data transfer between modules inside a VLSI chip. The use of multiple-rail encoding makes it possible to reduce the dynamic range in a single wire. If signal levels per wire are reduced, the asynchronous data transfer between modules can be performed more efficiently with maintained data-transfer capability. Some appropriate combinations of signal levels per wire and wire counts for low-power asynchronous communication are presented. In addition, the power-delay products per value for asynchronous data transfer between modules are evaluated, in some cases, using the proposed encoding scheme.","PeriodicalId":285497,"journal":{"name":"Proceedings. 34th International Symposium on Multiple-Valued Logic","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129405987","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Minimal partial hyperclones on a two-element set 双元集合上的极小部分超克隆
Proceedings. 34th International Symposium on Multiple-Valued Logic Pub Date : 2004-05-19 DOI: 10.1109/ISMVL.2004.1319929
J. Pantović, G. Vojvodic
{"title":"Minimal partial hyperclones on a two-element set","authors":"J. Pantović, G. Vojvodic","doi":"10.1109/ISMVL.2004.1319929","DOIUrl":"https://doi.org/10.1109/ISMVL.2004.1319929","url":null,"abstract":"Let A be a two-element set. It has been proven by Machida that the lattice of hyperclones has continuum cardinality. The current paper first determines all the minimal partial hyperclones. Following this, the authors give all three-element subsets of minimal hyperoperations whose union generates the clone of all hyperoperations as well as all four minimal subsets of minimal partial hyperoperations whose union generates the clone of all partial hyperoperations.","PeriodicalId":285497,"journal":{"name":"Proceedings. 34th International Symposium on Multiple-Valued Logic","volume":"337 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115952073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Many valued probability theory 多值概率论
Proceedings. 34th International Symposium on Multiple-Valued Logic Pub Date : 2004-05-19 DOI: 10.1109/ISMVL.2004.1319958
C. Morgan
{"title":"Many valued probability theory","authors":"C. Morgan","doi":"10.1109/ISMVL.2004.1319958","DOIUrl":"https://doi.org/10.1109/ISMVL.2004.1319958","url":null,"abstract":"The apparent conflict between many valued logic and probability theory is resolved if we treat the probability of a sentence as the probability that the sentence has some specified truth value. The classical probability of a sentence is the probability that the sentence is classically true. In an analogous way, we develop a class of probability theories appropriate for any finite valued logics; the probability of a sentence is interpreted as the probability that the sentence takes some value in a specified subset of the semantic range. We show that for any finite valued logic, there is an appropriate many valued probability theory providing a characteristic probabilistic semantics for which the logic is both sound and complete.","PeriodicalId":285497,"journal":{"name":"Proceedings. 34th International Symposium on Multiple-Valued Logic","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122457656","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Basic multiple-valued functions using recharge CMOS logic 使用充电CMOS逻辑的基本多值功能
Proceedings. 34th International Symposium on Multiple-Valued Logic Pub Date : 2004-05-19 DOI: 10.1109/ISMVL.2004.1319966
Y. Berg, S. Aunet, Øivind Næss, O. Mirmotahari
{"title":"Basic multiple-valued functions using recharge CMOS logic","authors":"Y. Berg, S. Aunet, Øivind Næss, O. Mirmotahari","doi":"10.1109/ISMVL.2004.1319966","DOIUrl":"https://doi.org/10.1109/ISMVL.2004.1319966","url":null,"abstract":"In this paper, we present novel recharge logic for multiple-valued (MV) systems by utilizing semi-floating-gate (SFG) transistors. The recharge multiple-valued logic can be used to implement low-power digital transition logic circuits. The improvement in power dissipation is mainly in reduced dynamic power dissipation. In this paper, the basic functions suitable for synthesis of MV logic are presented. The main purpose is to level out the power dissipated by a digital system to obtain more suitable logic for mixed mode design.","PeriodicalId":285497,"journal":{"name":"Proceedings. 34th International Symposium on Multiple-Valued Logic","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133988784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Algorithms for Taylor expansion diagrams [IC design/verification applications] Taylor展开图算法[IC设计/验证应用]
Proceedings. 34th International Symposium on Multiple-Valued Logic Pub Date : 2004-05-19 DOI: 10.1109/ISMVL.2004.1319947
G. Fey, R. Drechsler, M. Ciesielski
{"title":"Algorithms for Taylor expansion diagrams [IC design/verification applications]","authors":"G. Fey, R. Drechsler, M. Ciesielski","doi":"10.1109/ISMVL.2004.1319947","DOIUrl":"https://doi.org/10.1109/ISMVL.2004.1319947","url":null,"abstract":"The ever increasing size of integrated circuits results in large problem sizes during synthesis and verification of such designs. Recently Taylor expansion diagrams (TEDs) were introduced as a data structure to cope with large problem instances. TEDs allow us to exploit high level information in the representation of functions. In this paper, the basic TED operations are analyzed from a complexity point of view. Suggestions for optimizations of the originally proposed algorithms are made.","PeriodicalId":285497,"journal":{"name":"Proceedings. 34th International Symposium on Multiple-Valued Logic","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130518691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Characterization theorem of lattice implication algebras 格蕴涵代数的表征定理
Proceedings. 34th International Symposium on Multiple-Valued Logic Pub Date : 2004-05-19 DOI: 10.1109/ISMVL.2004.1319951
M. Kondo
{"title":"Characterization theorem of lattice implication algebras","authors":"M. Kondo","doi":"10.1109/ISMVL.2004.1319951","DOIUrl":"https://doi.org/10.1109/ISMVL.2004.1319951","url":null,"abstract":"In this paper, we show the characterization theorem of lattice implication algebras. The algebras were presented by Xu (J. Southwest Jiaotong Univ., p.20-27) in 1993. Our theorem means that the class of all lattice implication algebras coincides with the class of all bounded commutative BCK-algebras. Hence lattice implication algebras are categorically equivalent to MV-algebras and to Wajsberg algebras.","PeriodicalId":285497,"journal":{"name":"Proceedings. 34th International Symposium on Multiple-Valued Logic","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116134933","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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