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2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)最新文献

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Laser Spectral Linewidth Reduction Using an Integrated Pound-Drever-Hall Stabilization System in 180 nm CMOS SOI 180nm CMOS SOI中集成Pound-Drever-Hall稳定系统的激光谱线宽度减小
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2019-06-01 DOI: 10.1109/rfic.2019.8701755
M. H. Idjadi, F. Aflatouni
{"title":"Laser Spectral Linewidth Reduction Using an Integrated Pound-Drever-Hall Stabilization System in 180 nm CMOS SOI","authors":"M. H. Idjadi, F. Aflatouni","doi":"10.1109/rfic.2019.8701755","DOIUrl":"https://doi.org/10.1109/rfic.2019.8701755","url":null,"abstract":"An Integrated Pound-Drever-Hall laser stabilization system is demonstrated where the electronic and photonic components are monolithically integrated in the GF7RFSOI CMOS SOI process. An off-chip Fabry-Perot cavity with quality factor of 48000 is used as the frequency reference to reduce the linewidth of a commercially available distributed feedback laser from 246 kHz to 7 kHz. The electronic-photonic chip consumes 83 mW and occupies 1.6 mm2 area.","PeriodicalId":281385,"journal":{"name":"2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130398893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Full-Band Multi-Standard Global Analog & Digital Car Radio SoC with a Single Fixed-Frequency PLL 一个全频段多标准全球模拟和数字汽车无线电SoC与一个单一的固定频率锁相环
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2019-06-01 DOI: 10.1109/rfic.2019.8701825
L. Breems, J. van Sinderen, T. Fric, H. Stoffels, Franco Fritschij, H. Brekelmans, Hendrik van der Ploeg, Ulrich Möhlmann, R. Rutten, M. Bolatkale, Shagun Bajoria, J. Niehof, Bert Oude-Essink, G. Lassche
{"title":"A Full-Band Multi-Standard Global Analog & Digital Car Radio SoC with a Single Fixed-Frequency PLL","authors":"L. Breems, J. van Sinderen, T. Fric, H. Stoffels, Franco Fritschij, H. Brekelmans, Hendrik van der Ploeg, Ulrich Möhlmann, R. Rutten, M. Bolatkale, Shagun Bajoria, J. Niehof, Bert Oude-Essink, G. Lassche","doi":"10.1109/rfic.2019.8701825","DOIUrl":"https://doi.org/10.1109/rfic.2019.8701825","url":null,"abstract":"This paper presents a wideband car radio SoC for global multi-standard and multi-channel analog and digital broadcast radio. One of the major challenges of a wideband receiver is that the RF circuits and A/D converters need to have very high in-band IIP3 while the receiver NF should be low. These IIP3 and NF requirements are difficult to meet simultaneously. Key techniques to achieve low noise and very high linearity are high gain-bandwidth multi-inverter-based amplifiers supplied by PVT-tracking low-ohmic low dropout regulators, very linear high-speed 1-bit ΔΣ ADCs and a mixerless wideband AM front-end architecture. In FM mode the measured in-band IIP3 is 17.5dBm at a NF of 6dB. At maximum gain the NF is 4.1dB in DAB mode.","PeriodicalId":281385,"journal":{"name":"2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126761174","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A 55nm SAW-Less NB-IoT CMOS Transceiver in an RF-SoC with Phase Coherent RX and Polar Modulation TX 基于相位相干RX和极调制TX的rf soc中的55nm SAW-Less NB-IoT CMOS收发器
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2019-06-01 DOI: 10.1109/rfic.2019.8701840
P. Tseng, W. Yang, M. Wu, LM. Jin, DP. Li, EC. Low, C. Hsiao, H. Lin, KH. Yang, SC. Shen, C. Kuo, CL. Heng, GK. Dehng
{"title":"A 55nm SAW-Less NB-IoT CMOS Transceiver in an RF-SoC with Phase Coherent RX and Polar Modulation TX","authors":"P. Tseng, W. Yang, M. Wu, LM. Jin, DP. Li, EC. Low, C. Hsiao, H. Lin, KH. Yang, SC. Shen, C. Kuo, CL. Heng, GK. Dehng","doi":"10.1109/rfic.2019.8701840","DOIUrl":"https://doi.org/10.1109/rfic.2019.8701840","url":null,"abstract":"A SAW-Less NB-IoT transceiver for IoT devices with >10 years battery life and >164dB MCL is presented. Tunable RX Front-end supports 26 NB-IoT bands, achieves <−140dBm Narrowband Reference Signal Received Power (NRSRP) and tolerates up to −15dBm out-of-band blocking. RX phase continuity across sub-frames reduces RX power consumption by 30%. The Polar TX achieves >+4dBm output power, <5% EVM, and <−57dB 300kHz SEM. The 55nm transceiver consumes 11.8mW/25.8mW for receiving / transmitting, and occupies 2.23mm2 die area in a 5.6x5.6mm2 packaged chip.","PeriodicalId":281385,"journal":{"name":"2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"389 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134538090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A Frequency Tuneable Switched-Capacitor PA in 65nm CMOS 65nm CMOS的频率可调开关电容PA
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2019-06-01 DOI: 10.1109/rfic.2019.8701790
Zhidong Bai, A. Azam, J. Walling
{"title":"A Frequency Tuneable Switched-Capacitor PA in 65nm CMOS","authors":"Zhidong Bai, A. Azam, J. Walling","doi":"10.1109/rfic.2019.8701790","DOIUrl":"https://doi.org/10.1109/rfic.2019.8701790","url":null,"abstract":"A frequency tuneable, switched capacitor power amplifier (SCPA) is introduced that allows it to operate in relatively narrow channel bandwidths (10’s of MHz) while enabling operation across a much wider frequency band (>1GHz). An SCPA is connected in series with a fixed inductor and a digitally programmable capacitor (DPC) that allows frequency tuning of the SCPA resonance. A prototype is fabricated in a 65nm CMOS process and embedded with the DPC on a printed circuit board for validation. The measured prototype operates from supply voltages of 1.2 and 2.4 V and achieves linear operation over 58.8% fractional bandwidth (1.4–2.5 GHz) with less than 1.7 dB output power variation. Due to its linearity, no digital pre-distortion is required to achieve measured ACLR<−30 dBc and EVM<3.9%-rms over all operating frequencies when transmitting an LTE 64-QAM, 20 MHz OFDM symbol at >14.1 dBm.","PeriodicalId":281385,"journal":{"name":"2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127116763","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
A 4-element 28 GHz Millimeter-wave MIMO Array with Single-wire Interface using Code-Domain Multiplexing in 65 nm CMOS 一种采用码域复用技术的单线接口4元28ghz毫米波MIMO阵列
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2019-06-01 DOI: 10.1109/rfic.2019.8701732
Manoj Johnson, Armagan Dascuru, Kai Zhan, A. Galioğlu, Naresh Adepu, Sanket Jain, H. Krishnaswamy, A. Natarajan
{"title":"A 4-element 28 GHz Millimeter-wave MIMO Array with Single-wire Interface using Code-Domain Multiplexing in 65 nm CMOS","authors":"Manoj Johnson, Armagan Dascuru, Kai Zhan, A. Galioğlu, Naresh Adepu, Sanket Jain, H. Krishnaswamy, A. Natarajan","doi":"10.1109/rfic.2019.8701732","DOIUrl":"https://doi.org/10.1109/rfic.2019.8701732","url":null,"abstract":"Millimeter-wave MIMO systems with digitization of every element enable spatial multiplexing, virtual arrays for radar, digital beamforming (DBF) for high mobility scenarios. However, per-element digitization results in a formidable I/O challenge in large-scale tiled MIMO mmWave arrays. This work demonstrates a 28GHz 4-element MIMO RX with a single-wire interface that multiplexes the baseband signals of all elements and the LO reference through code-domain multiplexing. System considerations are presented and the approach is validated through DBF after de-multiplexing of the baseband signals from the single wire. Each element in the array achieves 16 dB conversion gain while consuming 60 mA from 1.2 V. The IC occupies 5.75 mm2 in 65-nm CMOS.","PeriodicalId":281385,"journal":{"name":"2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127817226","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
A Code-Domain RF Signal Processing Front-end for Simultaneous Transmit and Receive with 49.5 dB Self-Interference Rejection, 12.1 dBm Receive Compression, and 34.3 dBm Transmit Compression 一种具有49.5 dB自抗干扰、12.1 dBm接收压缩和34.3 dBm发送压缩的码域射频信号处理前端
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2019-06-01 DOI: 10.1109/rfic.2019.8701804
Hussam AlShammary, C. Hill, Ahmed Hamza, J. Buckwalter
{"title":"A Code-Domain RF Signal Processing Front-end for Simultaneous Transmit and Receive with 49.5 dB Self-Interference Rejection, 12.1 dBm Receive Compression, and 34.3 dBm Transmit Compression","authors":"Hussam AlShammary, C. Hill, Ahmed Hamza, J. Buckwalter","doi":"10.1109/rfic.2019.8701804","DOIUrl":"https://doi.org/10.1109/rfic.2019.8701804","url":null,"abstract":"This paper demonstrates a code-domain transceiver that incorporates a transmit (TX) modulator and receive (RX) RF signal correlator. We propose a transmission gate switch with 12.1-dBm/23.1-dBm P1dB/IIP3 for both RF correlation and filtering and rejects TX self-interference by 49.5 dB. An integrate-and-dump N-path filter improves rejection by 8 dB. The RX power consumption is 18 mW at 1 GHz. The TX modulator operates to RF power levels up to 34.3 dBm and consumes less than 40 mW for 300 Megachip-per-second (Mc/s). Over the air testing demonstrates synchronization with Barker codes.","PeriodicalId":281385,"journal":{"name":"2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124928711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 9 dB Noise Figure Fully Integrated 79 GHz Automotive Radar Receiver in 40 nm CMOS Technology 基于40纳米CMOS技术的9db噪声全集成79 GHz汽车雷达接收机
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2019-06-01 DOI: 10.1109/rfic.2019.8701748
T. Murakami, N. Hasegawa, Yoshiyuki Utagawa, T. Arai, S. Yamaura
{"title":"A 9 dB Noise Figure Fully Integrated 79 GHz Automotive Radar Receiver in 40 nm CMOS Technology","authors":"T. Murakami, N. Hasegawa, Yoshiyuki Utagawa, T. Arai, S. Yamaura","doi":"10.1109/rfic.2019.8701748","DOIUrl":"https://doi.org/10.1109/rfic.2019.8701748","url":null,"abstract":"This paper presents a low noise and fully integrated automotive radar receiver in 40 nm CMOS technology. The receiver adopts the direct conversion architecture, and it consists of a low noise amplifier (LNA), mixer, and analog baseband blocks. The three-stage LNA and the low noise mixer improve the whole receiver noise figure (NF). Integrated low-dropped out regulators (LDOs) generate 1.1 V for the LNA and the mixer core from 1.8 V supply. The receiver chip also includes a frequency doubler, phase-locked loop (PLL), bandgap reference bias circuit, and a serial peripheral interface (SPI). The die is packaged using the wafer level chip size package (WLCSP). The receiver achieves 9.0 dB NF at 81 GHz local (LO) and 76.8 dB maximum gain. Moreover, the receiver front-end shows -22.3 dBm IP1dB, and consumes 143 mW power dissipation, and 0.8 mm2 chip area.","PeriodicalId":281385,"journal":{"name":"2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130760632","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
22nm Ultra-Thin Body and Buried Oxide FDSOI RF Noise Performance 22nm超薄机身和埋藏氧化物FDSOI射频噪声性能
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2019-06-01 DOI: 10.1109/rfic.2019.8701740
O. Kane, L. Lucci, P. Scheiblin, S. Lépilliet, F. Danneville
{"title":"22nm Ultra-Thin Body and Buried Oxide FDSOI RF Noise Performance","authors":"O. Kane, L. Lucci, P. Scheiblin, S. Lépilliet, F. Danneville","doi":"10.1109/rfic.2019.8701740","DOIUrl":"https://doi.org/10.1109/rfic.2019.8701740","url":null,"abstract":"The drastic downscaling of the transistor size along with advances in material sciences allowed the development of low power CMOS technologies with competitive RF figure of merits suitable for millimeter applications. In this context, this paper presents the RF and noise characterization (up to 110 GHz) of an advanced 22 nm UTBB FDSOI technology developed by Globalfoundries. In addition to the excellent DC performance, the technology presents promising RF characteristics. Indeed, a maximum transconductance of 1.78 S/mm and a Fmax of 435 GHz are achieved. The technology also offers a state-of-the-art minimum noise figure (NFmin) of 0.45 dB at 20 GHz (with an associated Gain of 13 dB) for a drain current of 185 mA/mm.","PeriodicalId":281385,"journal":{"name":"2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121018235","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
RFIC 2019 Plenary Speaker 2 RFIC 2019全体演讲嘉宾
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2019-06-01 DOI: 10.1109/rfic.2019.8701861
{"title":"RFIC 2019 Plenary Speaker 2","authors":"","doi":"10.1109/rfic.2019.8701861","DOIUrl":"https://doi.org/10.1109/rfic.2019.8701861","url":null,"abstract":"","PeriodicalId":281385,"journal":{"name":"2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129774685","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Fully Integrated 60 GHz 10 Gb/s QPSK Transceiver with Digital Transmitter and T/R Switch in 65nm CMOS 65nm CMOS 全集成 60 GHz 10 Gb/s QPSK 收发器，带数字发射器和 T/R 开关
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2019-06-01 DOI: 10.1109/rfic.2019.8701811
Zheng Song, Jianfu Lin, Yutian Li, Jialiang Ye, Ruichang Ma, B. Chi
{"title":"A Fully Integrated 60 GHz 10 Gb/s QPSK Transceiver with Digital Transmitter and T/R Switch in 65nm CMOS","authors":"Zheng Song, Jianfu Lin, Yutian Li, Jialiang Ye, Ruichang Ma, B. Chi","doi":"10.1109/rfic.2019.8701811","DOIUrl":"https://doi.org/10.1109/rfic.2019.8701811","url":null,"abstract":"A fully integrated 60 GHz 10 Gb/s QPSK transceiver (TRX) with digital transmitter and T/R switch in 65nm CMOS is presented. The TRX consists of a direct-conversion receiver, a digital transmitter with on-chip QPSK modulator and a quadrature local-oscillation (LO) signals generation network with 20 GHz integer-N phase-locked loop (PLL) frequency synthesizer. A T/R switch is also integrated to interface with the antenna. RF bandwidth of the TRX is expanded to ~10GHz by using the magnetically coupled resonator based matching network. The QPSK modulation is directly realized in the I/Q digital power amplifier, which simplifies the transmitter complexity and reduces the power consumption. A 20 GHz integer-N PLL and a quadrature injection-locked frequency tripler (QILFT) are integrated on-chip to generate 60 GHz quadrature LO signals. The QILFT utilizes in-phase coupling technique to improve the LO I/Q matching and phase noise performance. The receiver achieves 7.1 dB noise figure and 25-47 dB dynamic gain range. The LO phase noise measured at the transmitter output is -93 dBc/Hz at 1-MHz offset from 60 GHz carrier. The measured error vector magnitude (EVM) of the transmitter is -23.9 dB for 10 Gb/s QPSK signals at 7 dBm output power. The EVM of the Over-the-Air (OTA) modulation-demodulation system is -16.3 dB for 10 Gb/s QPSK signals.","PeriodicalId":281385,"journal":{"name":"2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"55 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130321994","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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