2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)最新文献

Agent-based distributed power management for Kilo-core processors: Special Session: “Keeping Kilo-core chips cool: New directions and emerging solutions” 基于代理的千核处理器分布式电源管理:专题会议:“保持千核芯片冷却:新方向和新兴解决方案”

2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2013-12-23 DOI: 10.1109/ICCAD.2013.6691112

M. Shafique, J. Henkel

引用次数: 5

Post-route alleviation of dense meander segments in high-performance printed circuit boards 高性能印刷电路板中密集弯曲段的布线后缓解

2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2013-11-18 DOI: 10.1109/ICCAD.2013.6691193

Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann

{"title":"Post-route alleviation of dense meander segments in high-performance printed circuit boards","authors":"Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann","doi":"10.1109/ICCAD.2013.6691193","DOIUrl":"https://doi.org/10.1109/ICCAD.2013.6691193","url":null,"abstract":"Length-matching is an important technique to balance delays of bus signals in high-performance PCB routing. Existing routers, however, may generate dense meander segments with small distance. Signals propagating across these meander segments exhibit a speedup effect due to crosstalks between the segments of the same wire, thus leading to mismatch of arrival times even with the same physical wire length. In this paper, we propose a post-processing method to enlarge the width and the distance of meander segments and distribute them more evenly on the board so that the crosstalks can be reduced. In the proposed framework, we model the sharing combinations of available routing areas after removing dense meander segments from the initial routing, as well as the generation of relaxed meander segments and their groups in subareas. Thereafter, this model is transformed into an ILP problem and solved efficiently. Experimental results show that the proposed method can extend the width and the distance of meander segments about two times even under very tight area constraints, so that the crosstalks and thus the speedup effect can be alleviated effectively in high-performance PCB designs.","PeriodicalId":278154,"journal":{"name":"2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116070342","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Slack matching mode-based asynchronous circuits for average-case performance 基于松弛匹配模式的平均情况下性能异步电路

2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2013-11-18 DOI: 10.1109/ICCAD.2013.6691122

M. Najibi, P. Beerel

引用次数: 15

Modeling and analysis of (nonstationary) low frequency noise in nano devices: A synergistic approach based on stochastic chemical kinetics 纳米器件中(非平稳)低频噪声的建模和分析:基于随机化学动力学的协同方法

2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2013-11-18 DOI: 10.1109/ICCAD.2013.6691163

A. G. Mahmutoglu, A. Demir, J. Roychowdhury

{"title":"Modeling and analysis of (nonstationary) low frequency noise in nano devices: A synergistic approach based on stochastic chemical kinetics","authors":"A. G. Mahmutoglu, A. Demir, J. Roychowdhury","doi":"10.1109/ICCAD.2013.6691163","DOIUrl":"https://doi.org/10.1109/ICCAD.2013.6691163","url":null,"abstract":"Defects or traps in semiconductors and nano devices that randomly capture and emit charge carriers result in low-frequency noise, such as burst and 1/f noise, that are great concerns in the design of both analog and digital circuits. The capture and emission rates of these traps are functions of the time-varying voltages across the device, resulting in nonstationary noise characteristics. Modeling of low-frequency, nonstationary noise in circuit simulators is a longstanding open problem. It has been realized that the low frequency noise models in circuit simulators were the culprits that produced erroneous noise performance results for circuits under strongly time-varying bias conditions. In this paper, we first identify an almost perfect analogy between trap noise in nano devices and the so-called ion channel noise in biological nerve cells, and propose a new approach to modeling and analysis of low-frequency noise that is founded on this connection. We derive two fully nonstationary models for traps, a fine-grained Markov chain model based on recent previous work and a completely novel coarse-grained Langevin model based on similar models for ion channels in neurons. The nonstationary trap models we derive subsume and unify all of the work that has been done recently in the device modeling and circuit design literature on modeling nonstationary trap noise. We also describe joint noise analysis paradigms for a nonlinear circuit and a number of traps. We have implemented the proposed techniques in a Matlab® based circuit simulator, by expanding the industry standard compact MOSFET model PSP to include a nonstationary description of oxide traps. We present results obtained by this extended model and the proposed simulation techniques for the low frequency noise characterization of a common source amplifier and the phase jitter of a ring oscillator.","PeriodicalId":278154,"journal":{"name":"2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"15 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116853964","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

An IDDQ-based source driver IC design-for-test technique 一种基于iddq的源驱动IC测试设计技术

2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2013-11-18 DOI: 10.1109/ICCAD.2013.6691148

S. Lin, C.-L. Kao, J.-L. Huang, C. Lee, X.-L. Huang

引用次数: 0

Eagle-Eye: A near-optimal statistical framework for noise sensor placement 鹰眼:噪声传感器放置的近最佳统计框架

2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2013-11-18 DOI: 10.1109/ICCAD.2013.6691154

Tao Wang, Chun Zhang, Jinjun Xiong, Yiyu Shi

{"title":"Eagle-Eye: A near-optimal statistical framework for noise sensor placement","authors":"Tao Wang, Chun Zhang, Jinjun Xiong, Yiyu Shi","doi":"10.1109/ICCAD.2013.6691154","DOIUrl":"https://doi.org/10.1109/ICCAD.2013.6691154","url":null,"abstract":"The relentless technology scaling has led to significantly reduced noise margin and complicated functionalities. As such, design time techniques per se are less likely to ensure power integrity, resulting in runtime voltage emergencies. To alleviate the issue, recently several works have shed light on the possibilities of dynamic noise management systems. Most of these works rely on on-chip noise sensors to accurately capture voltage emergencies. However, they all assume, either implicitly or explicitly, that the placement of the sensors is given. It remains an open problem in the literature how to optimally place a given number of noise sensors for best voltage emergency detection. In this paper, we formally define the problem of noise sensor placement along with a novel sensing quality metric (SQM) to be maximized. We then put forward an efficient algorithm to solve it, which is proved to be optimal in the class of polynomial complexity approximations. Experimental results on a set of industrial power grid designs show that compared with a simple average-noise based heuristic and two state-of-the-art temperature sensor placement algorithms aiming at recovering the full map or capturing the hot spots at all times, the proposed method on average can reduce the miss rate of voltage emergency detections by 7.4x, 15x and 6.2x, respectively.","PeriodicalId":278154,"journal":{"name":"2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123602784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 19

CD-ECC: Content-dependent error correction codes for combating asymmetric nonvolatile memory operation errors CD-ECC:内容相关的纠错码，用于对抗非对称非易失性存储器操作错误

2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2013-11-18 DOI: 10.1109/ICCAD.2013.6691090

Wujie Wen, Mengjie Mao, Xiaochun Zhu, Seung H. Kang, Danghui Wang, Yiran Chen

{"title":"CD-ECC: Content-dependent error correction codes for combating asymmetric nonvolatile memory operation errors","authors":"Wujie Wen, Mengjie Mao, Xiaochun Zhu, Seung H. Kang, Danghui Wang, Yiran Chen","doi":"10.1109/ICCAD.2013.6691090","DOIUrl":"https://doi.org/10.1109/ICCAD.2013.6691090","url":null,"abstract":"The write operation asymmetry of many memory technologies causes different write failure rates at 0 →1 and 1 → 0 bit-flipping's. Conventional error correction codes (ECCs) spend the same efforts on both bit-flipping directions, leading to very unbalanced write reliability enchantment over different bit-flipping distributions of codewords (i.e., the number of 0 →1 or 1 → 0 bit-flipping's). In this work, we developed an analytic asymmetric write channel (AWC) model to analyze the asymmetric write errors in spin-transfer torque random access memory (STT-RAM) designs. A new ECC design concept, namely, content-dependent ECC (CD-ECC), is proposed to achieve balanced error correction at both bit-flipping directions. Two CD-ECC schemes - typical-corner-ECC (TCE) and worst-corner-ECC (WCE), are designed for the codewords with different bit-flipping distributions. Our simulation results show that compared to the common ECC schemes utilized in embedded applications like Hamming code, CD-ECCs can improve the STT-RAM write reliability by 10 - 30x with low hardware overhead and very marginal impact on system performance.","PeriodicalId":278154,"journal":{"name":"2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121323750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 45

Electromigration study for multi-scale power/ground vias in TSV-based 3D ICs 基于tsv的三维集成电路中多尺度电源/地通孔的电迁移研究

2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2013-11-18 DOI: 10.1109/ICCAD.2013.6691146

Jiwoo Pak, S. Lim, D. Pan

引用次数: 16

Parallel power grid analysis using preconditioned GMRES solver on CPU-GPU platforms 基于CPU-GPU平台的预处理GMRES求解器并行电网分析

2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2013-11-18 DOI: 10.1109/ICCAD.2013.6691171

Xuexin Liu, Hai Wang, S. Tan

{"title":"Parallel power grid analysis using preconditioned GMRES solver on CPU-GPU platforms","authors":"Xuexin Liu, Hai Wang, S. Tan","doi":"10.1109/ICCAD.2013.6691171","DOIUrl":"https://doi.org/10.1109/ICCAD.2013.6691171","url":null,"abstract":"In this paper, we propose an efficient parallel dynamic linear solver, called GPU-GMRES, for transient analysis of large power grid networks. The new method is based on the preconditioned generalized minimum residual (GMRES) iterative method implemented on heterogeneous CPU-GPU platforms. The new solver is very robust and can be applied to power grids with different structures and other applications like thermal analysis. The proposed GPU-GMRES solver adopts the very general and robust incomplete LU (ILU) based preconditioner. We show that by properly selecting the right amount of fill-ins in the incomplete LU factors, a good trade-off between GPU efficiency and GMRES convergence rate can be achieved for the best overall performance. Such a tunable feature makes this algorithm very adaptive to different problems. Furthermore, we properly partition the major computing tasks in GMRES solver to minimize the data traffic between CPU and GPU, which further boosts performance of the proposed method. Experimental results on the set of published IBM benchmark circuits and mesh-structured power grid networks show that the GPU-GMRES solver can deliver order of magnitudes speedup over the direct LU solver UMFPACK. GPU-GMRES can also deliver 3-10× speedup over the CPU implementation of the same GMRES method on transient analysis.","PeriodicalId":278154,"journal":{"name":"2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132131972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 19

DREAMS: DFM Rule EvAluation using Manufactured Silicon 梦想:DFM规则评估使用人造硅

2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2013-11-18 DOI: 10.1109/ICCAD.2013.6691104

R. D. Blanton, Fa Wang, Cheng Xue, Pranab K. Nag, Yang Xue, Xin Li

{"title":"DREAMS: DFM Rule EvAluation using Manufactured Silicon","authors":"R. D. Blanton, Fa Wang, Cheng Xue, Pranab K. Nag, Yang Xue, Xin Li","doi":"10.1109/ICCAD.2013.6691104","DOIUrl":"https://doi.org/10.1109/ICCAD.2013.6691104","url":null,"abstract":"DREAMS (DFM Rule EvAluation using Manufactured Silicon) is a comprehensive methodology for evaluating the yield-preserving capabilities of a set of DFM (design for manufacturability) rules using the results of logic diagnosis performed on failed ICs. DREAMS is an improvement over prior art in that the distribution of rule violations over the diagnosis candidates and the entire design are taken into account along with the nature of the failure (e.g., bridge versus open) to appropriately weight the rules. Silicon and simulation results demonstrate the efficacy of the DREAMS methodology. Specifically, virtual data is used to demonstrate that the DFM rule most responsible for failure can be reliably identified even in light of the ambiguity inherent to a nonideal diagnostic resolution, and a corresponding rule-violation distribution that is counter-intuitive. We also show that the combination of physically-aware diagnosis and the nature of the violated DFM rule can be used together to improve rule evaluation even further. Application of DREAMS to the diagnostic results from an in-production chip provides valuable insight in how specific DFM rules improve yield (or not) for a given design manufactured in particular facility. Finally, we also demonstrate that a significant artifact of DREAMS is a dramatic improvement in diagnostic resolution. This means that in addition to identifying the most ineffective DFM rule(s), validation of that outcome via physical failure analysis of failed chips can be eased due to the corresponding improvement in diagnostic resolution.","PeriodicalId":278154,"journal":{"name":"2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131632935","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13