An IDDQ-based source driver IC design-for-test technique

Abstract

Testing flat panel display source driver ICs is a costly process; the root cause is the internal DAC array which is functionally tested. This paper proposes an IDDQ-based design-for-test (DFT) technique to detect the open and short faults inside the DAC array. Compared to previous methods, the proposed DFT technique substantially improves the IDDQ testability and reduces the number of required analog measurements. Spice simulation results are presented to validate the effectiveness of the proposed technique in detecting open and short defects.