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IEEE Custom Integrated Circuits Conference 2006最新文献

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A 1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters 一个1.2 V, 24mw /ch, 10位，80msample /s流水线A/D转换器
IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320893
T. Ueno, Tomohiko Ito, Daisuke Kurose, T. Yamaji, T. Itakura
{"title":"A 1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters","authors":"T. Ueno, Tomohiko Ito, Daisuke Kurose, T. Yamaji, T. Itakura","doi":"10.1109/CICC.2006.320893","DOIUrl":"https://doi.org/10.1109/CICC.2006.320893","url":null,"abstract":"This paper describes 10-bit, 80-MSample/s pipelined A/D converters for wireless-communication terminals. To reduce power consumption, the authors employed the I/Q amplifier sharing technique (Kurose, et al., 2005) in which an amplifier is used for both I and Q channels. In addition, common-source, pseudo-differential (PD) amplifiers are used in all the conversion stages for further power reduction. Common-mode disturbances are removed by the proposed common-mode feedforward (CMFF) technique without using fully differential (FD) amplifiers. The converter was implemented in a 90-nm CMOS technology, and it consumes only 24 mW/ch from a 1.2-V power supply. The measured SNR and SNDR are 58.6 dB and 52.2 dB, respectively","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121591186","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
GHz Serial Passive Clock Distribution in VLSI Using Bidirectional Signaling VLSI中使用双向信令的GHz串行无源时钟分配
IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320872
V. Prodanov, M. Banu
{"title":"GHz Serial Passive Clock Distribution in VLSI Using Bidirectional Signaling","authors":"V. Prodanov, M. Banu","doi":"10.1109/CICC.2006.320872","DOIUrl":"https://doi.org/10.1109/CICC.2006.320872","url":null,"abstract":"Thr authors introduce a serial passive clock distribution technique allowing efficient and accurate skew removal at any arbitrary clock drop point. The passive transmission medium may be on-chip electrical transmission lines built in current IC technology or possible optical waveguides in future developments. The proposed technique is naturally insensitive to practical loses and other non ideal effects and has the capability of covering large chip areas","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124538089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A 4mW per-Channel 101dB-DR Stereo Audio DAC with Transformed Quantization Structure 具有转换量化结构的4mW单通道101dB-DR立体声音频DAC
IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320853
Yong-Hee Lee, Moo-Yeol Choi, Seung-Bin You, Wang-Seup Yeum, Hojin Park, Jae-Whui Kim
{"title":"A 4mW per-Channel 101dB-DR Stereo Audio DAC with Transformed Quantization Structure","authors":"Yong-Hee Lee, Moo-Yeol Choi, Seung-Bin You, Wang-Seup Yeum, Hojin Park, Jae-Whui Kim","doi":"10.1109/CICC.2006.320853","DOIUrl":"https://doi.org/10.1109/CICC.2006.320853","url":null,"abstract":"A 2.7V 4mW per-channel 20-bit 48kS/s sigma-delta stereo audio DAC, integrated in a 0.13mum CMOS technology, achieves a dynamic range (DR) of 101dB and occupies an active die area of 0.82mm2. The transformed quantization technique is proposed to decrease tonal behavior generated in low order sigma-delta modulator and the circuit is implemented to operate with optimal current consumption. The measured SNR and peak SNDR are 102dB and 95dB, respectively","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127686075","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Sizing Ground Taps to Minimize Substrate Noise Coupling in RF LNAs 对地抽头进行尺寸调整以减少射频LNAs中的衬底噪声耦合
IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320926
A. Sundaresan, T. Fiez, K. Mayaram
{"title":"Sizing Ground Taps to Minimize Substrate Noise Coupling in RF LNAs","authors":"A. Sundaresan, T. Fiez, K. Mayaram","doi":"10.1109/CICC.2006.320926","DOIUrl":"https://doi.org/10.1109/CICC.2006.320926","url":null,"abstract":"The influence of the sizing of ground taps on the noise injected into a 1.5GHz low noise amplifier (LNA), by a stepped buffer, for a heavily doped CMOS process is quantitatively examined. Precise modeling provides good agreement between measurements and simulations. A 10dB increase in isolation was achieved by scaling the area of the substrate contact by a factor of 400, and by increasing the proximity of the contacts to the sensitive transistors","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121599509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Efficient Far-Field Radio Frequency Power Conversion System for Passively Powered Sensor Networks 无源供电传感器网络的高效远场射频功率转换系统
IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320874
Triet Le, K. Mayaram, T. Fiez
{"title":"Efficient Far-Field Radio Frequency Power Conversion System for Passively Powered Sensor Networks","authors":"Triet Le, K. Mayaram, T. Fiez","doi":"10.1109/CICC.2006.320874","DOIUrl":"https://doi.org/10.1109/CICC.2006.320874","url":null,"abstract":"An RF-DC power conversion system is designed in a 0.25mum CMOS technology to efficiently convert RF energy to DC voltages. The rectifier has 60% efficiency and can rectify input voltages as low as 50mV by using floating gate transistors as rectifying diodes. For distances of 15 meters, 1 volt DC is measured with 0.3muA load current at 906MHz. The system operates with 5.5muW (-22.6 dBm) received power, corresponding to 42 meters operating distance with a 4W source","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121737069","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
An Integrated 90V Switch Array for Medical Ultrasound Applications 用于医学超声应用的集成90V开关阵列
IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320856
Ye-Ming Li, R. Wodnicki, Naveen Chandra, Naresh Rao
{"title":"An Integrated 90V Switch Array for Medical Ultrasound Applications","authors":"Ye-Ming Li, R. Wodnicki, Naveen Chandra, Naresh Rao","doi":"10.1109/CICC.2006.320856","DOIUrl":"https://doi.org/10.1109/CICC.2006.320856","url":null,"abstract":"An integrated 90V 16-channel CMOS analog switch array has been designed and fabricated for next generation medical ultrasound systems. The array was implemented in AMIS I2T100 technology; the die area is 14.72mm2. Measurement results show that the static power consumption is 110 W. The on resistance of the switch is 200, and the switch off-state isolation is -30dB","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"358 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115945620","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 3.8-5.5-GHz Multi-Band CMOS Frequency Synthesizer for WPAN/WLAN Applications 用于WPAN/WLAN应用的3.8-5.5 ghz多波段CMOS频率合成器
IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320953
Ja-yol Lee, Kwi-Dong Kim, Jong-Kee Kwon, Seung-Chul Lee, Jongdae Kim, Sang-Heung Lee
{"title":"A 3.8-5.5-GHz Multi-Band CMOS Frequency Synthesizer for WPAN/WLAN Applications","authors":"Ja-yol Lee, Kwi-Dong Kim, Jong-Kee Kwon, Seung-Chul Lee, Jongdae Kim, Sang-Heung Lee","doi":"10.1109/CICC.2006.320953","DOIUrl":"https://doi.org/10.1109/CICC.2006.320953","url":null,"abstract":"In this paper, we present a 3.8-5.5 GHz multi-band CMOS frequency synthesizer for WLAN and UWB applications. In the multi-band frequency synthesizer, both new multi-mode prescaler and adaptive multi-band LC VCO are proposed. The proposed multi-mode prescaler produces six modes of divide-by-2/3, 4/5, 8/9, 16/17, 32/33, and 64/65. In the adaptive multi-band LC VCO, the gate width of cross-coupled MOS array is tuned to calibrate oscillation amplitude and alleviate 1/f flicker noise of MOS. The multi-band frequency synthesizer represents -121 dBc/Hz at 5 MHz offset from 5.24 GHz carrier. The multi-band frequency synthesizer consumes a total current of 26mA at 1.2 V, and is manufactured in 0.13-mum CMOS process technology","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132408561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
A 0.6V Highly Linear Switched-R-MOSFET-C Filter 一个0.6V高线性开关r - mosfet - c滤波器
IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320841
P. Kurahashi, P. Hanumolu, G. Temes, U. Moon
{"title":"A 0.6V Highly Linear Switched-R-MOSFET-C Filter","authors":"P. Kurahashi, P. Hanumolu, G. Temes, U. Moon","doi":"10.1109/CICC.2006.320841","DOIUrl":"https://doi.org/10.1109/CICC.2006.320841","url":null,"abstract":"The design and performance of a switched-R-MOSFET-C filter is presented in this paper. The filter achieves -77dB THD using a 0.6V supply, and -90dB THD using a 0.8V supply, with a 0.6Vpp differential 2kHz sine input. High linearity at a low supply voltage is achieved by the use of duty-cycle controlled tuning inside a feedback loop","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130859941","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Predictive Modeling of the NBTI Effect for Reliable Design 可靠性设计中NBTI效应的预测建模
IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320885
Sarvesh Bhardwaj, Wenping Wang, R. Vattikonda, Yu Cao, S. Vrudhula
{"title":"Predictive Modeling of the NBTI Effect for Reliable Design","authors":"Sarvesh Bhardwaj, Wenping Wang, R. Vattikonda, Yu Cao, S. Vrudhula","doi":"10.1109/CICC.2006.320885","DOIUrl":"https://doi.org/10.1109/CICC.2006.320885","url":null,"abstract":"This paper presents a predictive model for the negative bias temperature instability (NBTI) of PMOS under both short term and long term operation. Based on the reaction-diffusion (R-D) mechanism, this model accurately captures the dependence of NBTI on the oxide thickness (tox), the diffusing species (H or H2) and other key transistor and design parameters. In addition, a closed form expression was derived for the threshold voltage change (DeltaVth ) under multiple cycle dynamic operation. Model accuracy and efficiency were verified with 90-nm experimental and simulation data. The impact of NBTI was further investigated on representative digital circuits","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130885694","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 437
A Calibration-Free 14b 70MS/s 3.3mm2 235mW 0.13um CMOS Pipeline ADC with High-Matching 3-D Symmetric Capacitors 具有高匹配三维对称电容的免校准14b 70MS/s 3.3mm2 235mW 0.13um CMOS流水线ADC
IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320860
Young-Jae Cho, Kyung-Hoon Lee, Hee-Cheol Choi, Seunghoon Lee, Kyoung-Ho Moon, Jae-Whui Kim
{"title":"A Calibration-Free 14b 70MS/s 3.3mm2 235mW 0.13um CMOS Pipeline ADC with High-Matching 3-D Symmetric Capacitors","authors":"Young-Jae Cho, Kyung-Hoon Lee, Hee-Cheol Choi, Seunghoon Lee, Kyoung-Ho Moon, Jae-Whui Kim","doi":"10.1109/CICC.2006.320860","DOIUrl":"https://doi.org/10.1109/CICC.2006.320860","url":null,"abstract":"A 14b 70MS/s 3-stage pipeline ADC in a 0.13mum CMOS process employs signal insensitive 3D fully symmetric capacitors for high matching accuracy without any calibration scheme. The prototype ADC with a 0.35mum minimum channel length for 2.5V system applications shows measured differential and integral nonlinearities of 0.65LSB and 1.80LSB at 14b, occupies a die area of 3.3mm2, and consumes 235mW at 70MS/s","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"138 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133293224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
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