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2006 International Conference on Computer Engineering and Systems最新文献

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The Optimized Tree-based Network on Chip Topologies for H.264 Decoder Design 面向H.264解码器设计的优化树型片上网络拓扑
2006 International Conference on Computer Engineering and Systems Pub Date : 2006-11-01 DOI: 10.1109/ICCES.2006.320472
Vu-Duc Ngo, Hae-Wook Choi, Younghwan Bae, Hanjin Cho
{"title":"The Optimized Tree-based Network on Chip Topologies for H.264 Decoder Design","authors":"Vu-Duc Ngo, Hae-Wook Choi, Younghwan Bae, Hanjin Cho","doi":"10.1109/ICCES.2006.320472","DOIUrl":"https://doi.org/10.1109/ICCES.2006.320472","url":null,"abstract":"A new chip design paradigm, so called network on chip, has been introduced based on the demand of integration of many heterogeneous semiconductor intellectual property (IP) blocks. In this paper, the H.264 decoder designed with three differently heterogenous tree-based network topologies are proposed. The topologies are designed so as to maximize the network throughput in accordance with the required transaction data between the functional modules of the H.264 decoder. This paper also evaluates these three topologies by comparing them to other regular topologies such as 2-D mesh and fat-tree with respects to throughput, power consumption and size. The simulated throughputs and various switch configurations are used as the inputs of the power modelling tool, known as Orion model. Hence, the static powers, areas, and dynamic energies of three topologies are calculated. The experiment results show that our tree-based topologies offer similar throughputs as fat-tree does and much higher throughputs compared to 2-D mesh while us less chip areas and power consumptions","PeriodicalId":261853,"journal":{"name":"2006 International Conference on Computer Engineering and Systems","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122231301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
IP encapsulation: Approach and Case Study IP封装:方法和案例研究
2006 International Conference on Computer Engineering and Systems Pub Date : 2006-11-01 DOI: 10.1109/ICCES.2006.320424
F. Abbes, Emmanuel Casseau, Mohamed Abid
{"title":"IP encapsulation: Approach and Case Study","authors":"F. Abbes, Emmanuel Casseau, Mohamed Abid","doi":"10.1109/ICCES.2006.320424","DOIUrl":"https://doi.org/10.1109/ICCES.2006.320424","url":null,"abstract":"The recent emergence of component-based designs helps the design of systems daring the refinement step between algorithmic specifications and architecture specifications. Designers' attempts such as flexibility, cost constraints, high performance and time to market can thus be helpfully managed. However, the correct integration of the architectures/components in a design implies complex verification/design problems. The proposed approach addresses the design of cycle accurate bit accurate (CABA) generic interface of such instantiated components. This paper suggests an IP encapsulation approach relying on a generic interface model considering the object oriented issues for simulation and architecture generation toward synthesis. The automatic interface generation has been experimented on the object motion detection (OMD) algorithm","PeriodicalId":261853,"journal":{"name":"2006 International Conference on Computer Engineering and Systems","volume":"705 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121152728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Interface Architecture Generation for IP Integration in SoC Design SoC设计中IP集成的接口架构生成
2006 International Conference on Computer Engineering and Systems Pub Date : 2006-11-01 DOI: 10.1109/ICCES.2006.320427
F. Abbes, Mohamed Abid, Emmanuel Casseau
{"title":"Interface Architecture Generation for IP Integration in SoC Design","authors":"F. Abbes, Mohamed Abid, Emmanuel Casseau","doi":"10.1109/ICCES.2006.320427","DOIUrl":"https://doi.org/10.1109/ICCES.2006.320427","url":null,"abstract":"Designing component-based SoC (system on chip) has become a communication design problem. The reuse of intellectual property (IP) cores in multiprocessor SoC is facilitated by the concept of packaging and wrapping. In this paper, we present an approach to automate the integration process of hardware accelerators/coprocessors. This approach gives an interface modelling considering communication adaptation concepts/context throughout the integration steps. Graph formalism has been established to specify the interface considering the IP execution cycle accurate behaviour. This allows for automatic generation of interface architecture for simulation towards its synthesis. We illustrate the utility of the proposed framework that enables faster simulation times compared to existing methodologies which allow the designer to quickly evaluate alternative system implementations","PeriodicalId":261853,"journal":{"name":"2006 International Conference on Computer Engineering and Systems","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124930782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Assessing Routing Behavior on On-Chip-Network 评估片上网络的路由行为
2006 International Conference on Computer Engineering and Systems Pub Date : 2006-11-01 DOI: 10.1109/ICCES.2006.320426
H. Nguyen, Vu-Duc Ngo, Hae-Wook Choi
{"title":"Assessing Routing Behavior on On-Chip-Network","authors":"H. Nguyen, Vu-Duc Ngo, Hae-Wook Choi","doi":"10.1109/ICCES.2006.320426","DOIUrl":"https://doi.org/10.1109/ICCES.2006.320426","url":null,"abstract":"Network-on-chip (NoC) is being proposed as a scalable and reusable communication platform for future SoC applications. An important problem in NoC design is deciding the type of routing which is one of the most crucial key factors that greatly affects the NoC architecture based systems performance. Currently, most of the proposals for routing in NoC are based upon deterministic routing mechanism because it gives better latency at low packet injection and requires less resources while guaranteeing an orderly packet arrival. However, the disadvantage of deterministic routing is that it cannot respond to dynamic network condition such as congestion. When the network becomes congested, adaptive routing provides better throughput and lower latency by allowing alternate paths. In this paper, using simulation, we evaluate the performance of adaptive routing algorithm to deterministic routing strategy respected to throughput, power consumption and latency. The simulation environment is 2D-mesh based NoC topology including different kinds of mapping video object plane decoder (VOPD) application onto this architecture. The experiment results prove the adaptive routing performance under network congestion occurrence","PeriodicalId":261853,"journal":{"name":"2006 International Conference on Computer Engineering and Systems","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121792653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Enhancing Fault Tolerance And Reliability In GAIAOS Through Structured Overlay Network 利用结构化覆盖网络增强GAIAOS的容错性和可靠性
2006 International Conference on Computer Engineering and Systems Pub Date : 2006-11-01 DOI: 10.1109/ICCES.2006.320477
F. Umer, O. Bashir
{"title":"Enhancing Fault Tolerance And Reliability In GAIAOS Through Structured Overlay Network","authors":"F. Umer, O. Bashir","doi":"10.1109/ICCES.2006.320477","DOIUrl":"https://doi.org/10.1109/ICCES.2006.320477","url":null,"abstract":"GAIAOS event manager is a distributed event service, based on CORBA event service with a centralized entry point, resulting in limited fault resilience and scalability. In this paper, we have proposed a decentralized event service for GAIAOS through the use of DHT based structured overlay network to overcome these problems. The proposed architecture provides a completely distributed event communication mechanism without any centralized entry point. Incorporation of the structured overlay network in GAIAOS results in higher degree of fault resilience and scalability","PeriodicalId":261853,"journal":{"name":"2006 International Conference on Computer Engineering and Systems","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131747799","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
On-Line Distributed Neurocontrollers Based on Microcontrollers 基于单片机的在线分布式神经控制器
2006 International Conference on Computer Engineering and Systems Pub Date : 2006-11-01 DOI: 10.1109/ICCES.2006.320438
H. Mousa, M. El-Bardini, S. Elaraby, M. Koutb
{"title":"On-Line Distributed Neurocontrollers Based on Microcontrollers","authors":"H. Mousa, M. El-Bardini, S. Elaraby, M. Koutb","doi":"10.1109/ICCES.2006.320438","DOIUrl":"https://doi.org/10.1109/ICCES.2006.320438","url":null,"abstract":"This paper concerns the development of a practical distributed on-line neurocontrollers for temperature processes using microcontrollers. The suggested controllers are composed of a network of microcontrollers that are coordinated by a supervisor microcontroller interfaced with the user via LCD and remote control system. This distributed control system supports serial data communication with PC. Implementation of the designed distributed control system to control multi-furnace has carried out. The system performance is considered in the cases of disturbance free and disturbance present. Experimental results illustrations of the designed system are indicated","PeriodicalId":261853,"journal":{"name":"2006 International Conference on Computer Engineering and Systems","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117330920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Position Detection of Adjacent Buried Objects from Their Self-Potential Anomalies Using ICA and LVQ Techniques 基于ICA和LVQ技术的邻近埋藏目标自电位异常位置检测
2006 International Conference on Computer Engineering and Systems Pub Date : 2006-11-01 DOI: 10.1109/ICCES.2006.320485
T. Tobely
{"title":"Position Detection of Adjacent Buried Objects from Their Self-Potential Anomalies Using ICA and LVQ Techniques","authors":"T. Tobely","doi":"10.1109/ICCES.2006.320485","DOIUrl":"https://doi.org/10.1109/ICCES.2006.320485","url":null,"abstract":"The self-potential anomalies produced by simple polarized geologic structures are used in the position detection of buried objects such as rocks or minerals. If these objects are adjacent, a mixed self-potential anomaly data will be measured. However, the detection of the objects position from this mixed self-potential anomaly data is usually not possible. In this paper, the mixed self-potential anomaly data is first separated by a blind signal separation technique called the independent component analysis (ICA), then the learning vector quantization (LVQ) neural network is used in the position detection of the separated self-potential anomalies. The proposed system achieves very high accuracy","PeriodicalId":261853,"journal":{"name":"2006 International Conference on Computer Engineering and Systems","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125355488","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Data Mining for Electrical Load Forecasting In Egyptian Electrical Network 埃及电网负荷预测的数据挖掘
2006 International Conference on Computer Engineering and Systems Pub Date : 2006-11-01 DOI: 10.1109/ICCES.2006.320491
H.K. Mohamed, S. El-Debeiky, H. Mahmoud, K.M. El Destawy
{"title":"Data Mining for Electrical Load Forecasting In Egyptian Electrical Network","authors":"H.K. Mohamed, S. El-Debeiky, H. Mahmoud, K.M. El Destawy","doi":"10.1109/ICCES.2006.320491","DOIUrl":"https://doi.org/10.1109/ICCES.2006.320491","url":null,"abstract":"The paper presents the design of a model for forecasting long-term electricity load. The model uses data mining techniques. The paper defines the load forecast and the summary of the most important factors affecting the load forecast in Egyptian electricity network. The steps needed for the knowledge discovery process is implemented to the time series data. Preprocessing the data in order to detect the missing value, odd value, outliers and normalize data. The output from the preprocessing step is fed into multiple regression or neural network to predict the coefficient parameters. Comparison between different cases using different techniques is indicated","PeriodicalId":261853,"journal":{"name":"2006 International Conference on Computer Engineering and Systems","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130670011","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Quadrature Direct Digital Frequency Synthesizer Using FPGA 基于FPGA的正交直接数字频率合成器
2006 International Conference on Computer Engineering and Systems Pub Date : 2006-11-01 DOI: 10.1109/ICCES.2006.320418
M. Saber, M. Elmasry, M. Abo-Elsoud
{"title":"Quadrature Direct Digital Frequency Synthesizer Using FPGA","authors":"M. Saber, M. Elmasry, M. Abo-Elsoud","doi":"10.1109/ICCES.2006.320418","DOIUrl":"https://doi.org/10.1109/ICCES.2006.320418","url":null,"abstract":"A low-power quadrature direct digital frequency synthesizer (DDFS) is presented. Such system is based on a classical DDFS structure. In order to avoid the high power consumption, no ROM is used but piecewise linear approximation is employed. The system is implemented using FPGA with 3.3 V supply voltage. The power consumption is 3.96 mW. The spurious-free dynamic range is better than 59 dBc at low synthesized frequencies and the frequency resolution is 1.5 kHz","PeriodicalId":261853,"journal":{"name":"2006 International Conference on Computer Engineering and Systems","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131128802","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Evaluation of Ad Hoc Routing Protocols in Real Simulation Environments 真实仿真环境下Ad Hoc路由协议的评估
2006 International Conference on Computer Engineering and Systems Pub Date : 2006-11-01 DOI: 10.1109/ICCES.2006.320463
Amr Hassan, M. Youssef, M. Zahra
{"title":"Evaluation of Ad Hoc Routing Protocols in Real Simulation Environments","authors":"Amr Hassan, M. Youssef, M. Zahra","doi":"10.1109/ICCES.2006.320463","DOIUrl":"https://doi.org/10.1109/ICCES.2006.320463","url":null,"abstract":"In order to conduct meaningful performance analysis of routing algorithms in the context of mobile ad hoc networks (MANETs), it is essential that the underlying mobility model on which the simulation is based reflects realistic mobility behavior. In this paper, the most widely known ad hoc routing protocols will be simulated in our proposed real simulation environment to figure out the effect of real environmental simulation on ad hoc routing protocols and to show the robustness of current simulation output results","PeriodicalId":261853,"journal":{"name":"2006 International Conference on Computer Engineering and Systems","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126014770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 23
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