2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)最新文献_第3页

Variable frequency self-oscillating converter applied as a LED driver 应用于LED驱动的变频自振荡变换器

2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) Pub Date : 2017-11-01 DOI: 10.1109/ROPEC.2017.8261679

Efrén Flores García, Ramón Díaz de León Zapata, Ariel B. de la Rosa Zapata

引用次数: 2

Assessing the participation of consumers on one-side dispatchable demand response programs in reserve service market 储备服务市场中消费者对单边可调度需求响应计划的参与评估

2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) Pub Date : 2017-11-01 DOI: 10.1109/ROPEC.2017.8261670

José Antonio Estrada Calderón, Jose Hernandez

{"title":"Assessing the participation of consumers on one-side dispatchable demand response programs in reserve service market","authors":"José Antonio Estrada Calderón, Jose Hernandez","doi":"10.1109/ROPEC.2017.8261670","DOIUrl":"https://doi.org/10.1109/ROPEC.2017.8261670","url":null,"abstract":"Power systems and electricity markets, in a yearly basis, almost always have experienced a demand increase, and actually the participation of controllable loads in the operation of power systems is playing an important role. Several demand response programs dispatched by the independent system operator (ISO) have been implemented by the incorporation of controllable loads in the power system operation, which can be seen as a generation resource through its reduction in periods that are critical for the safety of the electricity network or when the levels of energy resources are limited. This paper proposes a dispatchable demand response classification with respect to the kind of basic contracts that may be realized between the participants of the dispatchable demand response programs and the ISO. Also, in order of illustrating the evaluation of the financial relevance of a consumer participating in a demand response program, a program that has been applied in Mexico for 10 years, denominated Tariff I15, is used. The results of the financial analysis show that this program is attractive both for the market operator and the system, as well as for the consumer.","PeriodicalId":260469,"journal":{"name":"2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131640751","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Implementation and optimization of the algorithm of automatic color enhancement in digital images 数字图像自动色彩增强算法的实现与优化

2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) Pub Date : 2017-11-01 DOI: 10.1109/ROPEC.2017.8261651

J. Romero, L. Prócel, L. Trojman, Damien Verdier

引用次数: 7

Design and analysis of performance of a forward converter with winding tertiary 带绕组的正激变换器的设计与性能分析

2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) Pub Date : 2017-11-01 DOI: 10.1109/ROPEC.2017.8261632

Brian Loza, Josué Pacheco Chérrez, L. G. González

引用次数: 3

State estimation of unbalanced electric distribution systems using positive sequence equivalents and homotopy methods 不平衡配电系统状态估计的正序列等价和同伦方法

2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) Pub Date : 2017-11-01 DOI: 10.1109/ROPEC.2017.8261664

Gabriel O. Rubio-Marroquin, C. Fuerte-Esquivel, E. Zamora-Cardenas

引用次数: 0

Three-phase grid-tied photovoltaic inverter with reactive power compensation capability 具有无功补偿能力的三相并网光伏逆变器

2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) Pub Date : 2017-11-01 DOI: 10.1109/ROPEC.2017.8261635

A. Arellanes, E. Rodriguez, R. Orosco, J. Pérez, J. Beristáin

引用次数: 5

Real-time induction motor velocity controller applying SOSM super-twisting combined with state-feedback linearization 基于状态反馈线性化的SOSM超扭转实时异步电机速度控制器

2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) Pub Date : 2017-11-01 DOI: 10.1109/ROPEC.2017.8261593

O. A. Morfín, B. Aguilar, H. Gabbar, F. Ornelas‐Tellez, R. Ruiz-Cruz, A. Valderrábano‐González, C. Castañeda

{"title":"Real-time induction motor velocity controller applying SOSM super-twisting combined with state-feedback linearization","authors":"O. A. Morfín, B. Aguilar, H. Gabbar, F. Ornelas‐Tellez, R. Ruiz-Cruz, A. Valderrábano‐González, C. Castañeda","doi":"10.1109/ROPEC.2017.8261593","DOIUrl":"https://doi.org/10.1109/ROPEC.2017.8261593","url":null,"abstract":"On this paper, a robust velocity controller based on state-feedback linearization technique combined with super-twisting control law, as a second order sliding mode algorithm, is proposed. This closed-loop scheme is applied to a three-phase squirrel cage induction that drives a mechanical load settled by an induction generator which spins above synchronous velocity. The control goals are to regulate the rotor velocity and the squared module of rotor flux linkages that tracks a signal which varies according to stator currents. The controller design is made in aß coordinate frame where the control input signals are conditioned with space vector pulse width modulation to activate the IGBT's of the three-phase converter bridge. The rotor flux linkages are estimated via a reduced-observer by applying sliding modes; meanwhile, the load torque is estimated by an asymptotic reduced-observer. The robustness of the proposed controller is validated through real-time experimentation under extreme test where the velocity reference signal is a pulse train.","PeriodicalId":260469,"journal":{"name":"2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129545876","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Harmonic linear time invariant modeling of grid-connected parallel inverters-based microgrids 并网并联逆变器微电网的谐波线性时不变建模

2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) Pub Date : 2017-11-01 DOI: 10.1109/ROPEC.2017.8261634

J. Hernández-Ramírez, J. Segundo, F. Martínez-Cárdenas, E. Barocio

引用次数: 2

Compact ultra low power class AB buffer amplifier 紧凑型超低功耗AB级缓冲放大器

2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) Pub Date : 2017-11-01 DOI: 10.1109/ROPEC.2017.8261576

Ali Far

{"title":"Compact ultra low power class AB buffer amplifier","authors":"Ali Far","doi":"10.1109/ROPEC.2017.8261576","DOIUrl":"https://doi.org/10.1109/ROPEC.2017.8261576","url":null,"abstract":"Targeting the energy harvesting applications that require multiple channels of matched buffer amplifiers on a chip, a small rail-to-rail input-output, ultra low current, and low supply voltage (VDD) buffer amplifier is presented. The contributions of this work are as follows: First, an output buffer driver utilizes a loser-take-all circuit (LTA) and a current mirror amplifier (CMA) circuit to regulate the current in either of the inactive sink or source output driver transistors (FET). In conjunction with the LTA and CMA, a complementary noninverting current mirror (CNICM), monitors and rectifies the sink-source output signals before they are fed to the LTA circuit. Hence, the amplifier's current consumption, attributed to monitoring external loads, is substantially curbed. More importantly, because all the elements of the buffer driver (LTA, CMA, and CNICM) operate mainly in current mode, the output buffer driver is structurally fast and can operate with low VDD of about VGS+2VDS. Second, a floating current source (FCS) function is emulated that can also operate with low VDD and is fast in lieu of utilizing auxiliary common gate amplifiers (CGA). The FCS contains two complementary cascoded FET current sources where the middle cascoded FET's VGSs are held constant and their drain currents are criss-crossed and fed to each other's source terminals, while CGAs regulate the VGSs of the lower FETs, whose currents are substantially equalized and mirrored into the Amplifier's bias network. Montecarlo (MC) and worst case (WC) simulations indicate the following specifications are achievable: VDD minimum ∼ 0.8v; IDD ∼ 200nA; input voltage range rail to rail; output voltage range ∼ 10mV from the rails; open loop gain (AV) ∼ 115dB with unity gain bandwidth (fU) ∼ 600KHz and phase margin (PM) ∼ 30 degrees; power supply rejection ratio (PSRR) ∼ − 88dB; common mode rejection ratio (CMRR) ∼ − 120dB; slew rate (SR) ∼ 2V/ 5uS; settling time (tS) ∼ 10uS; output resistor (RL) capability ∼10K Ohms; and die size rough estimate is 100 um per side.","PeriodicalId":260469,"journal":{"name":"2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)","volume":"34 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131116964","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Semantic genetic operators based on a selection mechanism tailored for the root function 基于根函数选择机制的语义遗传算子

2017 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) Pub Date : 2017-11-01 DOI: 10.1109/ROPEC.2017.8261638

Claudia N. Sánchez, Mario Graff

引用次数: 2