N. Lylina, A. Atteya, Chih-Hao Wang, H. Wunderlich
{"title":"Security Preserving Integration and Resynthesis of Reconfigurable Scan Networks","authors":"N. Lylina, A. Atteya, Chih-Hao Wang, H. Wunderlich","doi":"10.1109/ITC44778.2020.9325227","DOIUrl":"https://doi.org/10.1109/ITC44778.2020.9325227","url":null,"abstract":"Reliable operation, test, debug and diagnosis of complex integrated systems are ensured by embedded instruments, such as sensors, aging monitors or Built-In Self-Test (BIST) registers. Reconfigurable Scan Networks (RSNs) offer a flexible and efficient way to access such test instruments throughout the whole life-cycle. However, improper RSN integration might introduce additional connectivity properties to the device under test (DUT), which can be exploited to perform unauthorized access or cause information leakage. The existence of such additional connectivity through the RSN can compromise the security of the DUT and is considered as a security threat.In this paper, a method is presented to resolve all such security compliance violations. The problem is formulated in terms of Integer Linear Programming (ILP) as a minimum cut problem in multicommodity flow. An efficient heuristic is presented, which, to our knowledge, for the first time allows to consider the whole set of violations simultaneously and thereby to find a minimized number of changes to the RSN structure in order to make it compliant with the initial security requirements of the DUT and prevent the information leakage through the scan chain.","PeriodicalId":251504,"journal":{"name":"2020 IEEE International Test Conference (ITC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125014009","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ussama Zahid, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, K. Vissers
{"title":"FAT: Training Neural Networks for Reliable Inference Under Hardware Faults","authors":"Ussama Zahid, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, K. Vissers","doi":"10.1109/ITC44778.2020.9325249","DOIUrl":"https://doi.org/10.1109/ITC44778.2020.9325249","url":null,"abstract":"Deep neural networks (DNNs) are state-of-the-art algorithms for multiple applications, spanning from image classification to speech recognition. While providing excellent accuracy, they often have enormous compute and memory requirements. As a result of this, quantized neural networks (QNNs) are increasingly being adopted and deployed especially on embedded devices, thanks to their high accuracy, but also since they have significantly lower compute and memory requirements compared to their floating point equivalents. QNN deployment is also being evaluated for safety-critical applications, such as automotive, avionics, medical or industrial. These systems require functional safety, guaranteeing failure-free behaviour even in the presence of hardware faults. In general fault tolerance can be achieved by adding redundancy to the system, which further exacerbates the overall computational demands and makes it difficult to meet the power and performance requirements. In order to decrease the hardware cost for achieving functional safety, it is vital to explore domain-specific solutions which can exploit the inherent features of DNNs. In this work we present a novel methodology called fault-aware training (FAT), which includes error modeling during neural network (NN) training, to make QNNs resilient to specific fault models on the device. Our experiments show that by injecting faults in the convolutional layers during training, highly accurate convolutional neural networks (CNNs) can be trained which exhibits much better error tolerance compared to the original. Furthermore, we show that redundant systems which are built from QNNs trained with FAT achieve higher worse-case accuracy at lower hardware cost. This has been validated for numerous classification tasks including CIFAR10, GTSRB, SVHN and ImageNet.","PeriodicalId":251504,"journal":{"name":"2020 IEEE International Test Conference (ITC)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126908707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Fast EVM Tuning of MIMO Wireless Systems Using Collaborative Parallel Testing and Implicit Reward Driven Learning","authors":"Suhasini Komarraju, A. Chatterjee","doi":"10.1109/ITC44778.2020.9325270","DOIUrl":"https://doi.org/10.1109/ITC44778.2020.9325270","url":null,"abstract":"Modern 5G and projected 6G wireless systems deploy massive MIMO systems with antenna arrays and novel RF transceiver architectures that admit RF beamforming. Testing and tuning of the underlying transceiver arrays on a per-transceiver basis is expensive and can be expedited through the use of parallel testing and tuning techniques that stimulate the entire array transceiver system concurrently. State of the art parallel testing techniques require frequency separation between the tones applied to individual RF chains due to combining of RF signals before down-conversion in analog beamforming MIMO systems. Test schemes that allow some frequency overlap are limited to testing only third order distortion. In this paper, we first present a parallel testing scheme for testing large MIMO transceiver arrays that is amenable to higher order distortion (upto fifth order) in the RF chains considered. Second, we propose a tuning scheme for the entire MIMO array which implicitly tunes for EVM system specifications without explicit knowledge of the relationship between the system test response, the system tuning knobs and the corresponding EVM and SINR specification values. A cost metric is formulated that allows such a solution using reinforcement (multi-arm bandit) learning driven system tuning. Significant yield improvement using this approach is demonstrated by simulation experiments.","PeriodicalId":251504,"journal":{"name":"2020 IEEE International Test Conference (ITC)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128363661","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}