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2008 IEEE International Conference on Electron Devices and Solid-State Circuits最新文献

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A low power consumption 10-bit rail-to-rail SAR ADC using a C-2C capacitor array 采用C-2C电容阵列的低功耗10位轨对轨SAR ADC
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760721
Hoonki Kim, Young-Jae Min, Yonghwan Kim, Soo-Won Kim
{"title":"A low power consumption 10-bit rail-to-rail SAR ADC using a C-2C capacitor array","authors":"Hoonki Kim, Young-Jae Min, Yonghwan Kim, Soo-Won Kim","doi":"10.1109/EDSSC.2008.4760721","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760721","url":null,"abstract":"A 10-bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for biomedical applications is presented. The proposed SAR ADC achieves rail-to-rail input range and low power consumption. A Digital-to-Analog Converter (DAC) using C-2C capacitor array and dynamic comparator is used for low power consumption. It is realized in 0.18 mum standard CMOS technology. This ADC has signal to noise and distortion ratios (SNDR) of 53.8dB for 1.5 V supply voltage. It consumes 13.4 muW at sampling rates of 137 kS/s.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131342422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 40
A low power high speed ROIC design for 1024×1024 IRFPA with novel readout stage 具有新颖读出级的1024×1024 IRFPA低功耗高速ROIC设计
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760710
Chang Liu, Wengao Lu, Zhongjian Chen, Haimei Bian, L. Ji
{"title":"A low power high speed ROIC design for 1024×1024 IRFPA with novel readout stage","authors":"Chang Liu, Wengao Lu, Zhongjian Chen, Haimei Bian, L. Ji","doi":"10.1109/EDSSC.2008.4760710","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760710","url":null,"abstract":"A low power high speed Read-Out Integrated Circuit (ROIC) for a short-wave Infra-Red Focal Plane Array (IRFPA) is designed as a prototype for 1024 times 1024 image system. Ripple integration and readout scheme as well as highly efficient power management are introduced to this design in order to decrease total power. To further increase the readout speed while decrease the power dissipation, a novel readout stage is proposed and adopted in this circuit. By using the new structure, the ROIC achieves a data rate of 10 M/s per channel, with the total power dissipation of 56 mW.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"673 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113999062","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Temperature dependence of AlGaN/GaN HEMT-compatible lateral field effect rectifier AlGaN/GaN hemt兼容侧场效应整流器的温度依赖性
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760656
King-yuen Wong, Wanjun Chen, Wei Huang, K.J. Chen
{"title":"Temperature dependence of AlGaN/GaN HEMT-compatible lateral field effect rectifier","authors":"King-yuen Wong, Wanjun Chen, Wei Huang, K.J. Chen","doi":"10.1109/EDSSC.2008.4760656","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760656","url":null,"abstract":"The lateral field effect rectifier (L-FER) on AlGaN/GaN heterostructure on silicon substrate compatible with the HEMT process has been characterized for high temperature operation (up to 250 degC). The proposed rectifier takes advantage of adjusting the forward-on voltage to a slightly positive value by fluorine plasma treatment. The temperature dependences of the forward-on voltage and the on-resistance of the rectifiers with different drift lengths were measured. The knee voltage of the rectifier exhibits very little temperature dependence as the temperature raised to 250 degC. These results indicate that L-FER is promising for operation over a wide range of ambient temperatures.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114843205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Evaluation of defects reduction and pattern abnormal on semiconductor Copper Dual Damascene process 半导体铜双大马士革工艺缺陷减少和图案异常的评价
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760632
C. Weng
{"title":"Evaluation of defects reduction and pattern abnormal on semiconductor Copper Dual Damascene process","authors":"C. Weng","doi":"10.1109/EDSSC.2008.4760632","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760632","url":null,"abstract":"Process manufacturing defects can often impact product yields, depending upon the type, size, and location of the defect, as well as the design and yield sensitivity of the respective semiconductor product devices. This paper presents comprehensive the investigating a novel process method on semiconductor copper BEOL (Back-End-Of-Line) manufacturing process and technology integration on optimal integrated lithography especially on anti-reflective coating (ARC) film and gap fill process (GFP) process and etching module process integration to the problem of defects reduction on semiconductor wafer manufacturing processes.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128630722","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Submicron free space optical interferometer 亚微米自由空间光学干涉仪
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760726
Chianchiu Li, O. Choy, H. Ho
{"title":"Submicron free space optical interferometer","authors":"Chianchiu Li, O. Choy, H. Ho","doi":"10.1109/EDSSC.2008.4760726","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760726","url":null,"abstract":"We propose a novel submicron optical interferometer for free space applications. A beam is split into two narrow beams by wavefront division. After going through different phase shift, the two beams merge by themselves due to diffraction effect. Because of the self-mixing effect, lens and other discrete components are no longer needed, which enables a simple and ultra-compact structure and a manufacturing process compatible with the semiconductor technology. We use finite-difference time-domain (FDTD) simulations to demonstrate principles of the interferometer and make estimate of the signal-to-noise ratio.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"372 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123492339","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Optimizing technology of bulk electronic field for lateral high-voltage devices 横向高压器件体电场优化技术
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760735
Bo Zhang, Jianbing Cheng, Shengdong Hu, X. Luo, M. Qiao, B. Duan, Zhaoji Li
{"title":"Optimizing technology of bulk electronic field for lateral high-voltage devices","authors":"Bo Zhang, Jianbing Cheng, Shengdong Hu, X. Luo, M. Qiao, B. Duan, Zhaoji Li","doi":"10.1109/EDSSC.2008.4760735","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760735","url":null,"abstract":"REBULF (reduced bulk field) and ENDIF (enhanced dielectric layer field) technologies are used in the design of lateral power devices to improve breakdown voltage. The two technologies have been shown to offer good performance in a variety of application domains, both in bulk silicon and SOI substrates. This paper aims to offer a compendious and timely review of the two technologies and some works of our lab on the application of the two technologies in bulk silicon and SOI devices.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124180558","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
On the effect of scattering in Schottky Barrier MOSFETs 肖特基势垒mosfet中散射的影响
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760703
L. Zeng, Xiao Yan Liu, G. Du, J. Kang, R. Han
{"title":"On the effect of scattering in Schottky Barrier MOSFETs","authors":"L. Zeng, Xiao Yan Liu, G. Du, J. Kang, R. Han","doi":"10.1109/EDSSC.2008.4760703","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760703","url":null,"abstract":"In this paper, we performed a simulation on a 45-nm UTB SOI Schottky Barrier MOSFETs using our two dimensional Ensemble full band Monte Carlo simulator to evaluate the effect of scattering in Schottky Barrier MOSFETs (SB FETs). The carrier transport details for both ballistic case and scattering case are simulated and analyzed. The scattering plays a less important role on the performance in SB FETs than in conventional highly doped S/D MOSFETs. Based on our analysis, the inappropriate of Natoripsilas ballistic transport model applied to SB FETs is revealed and the reason is due to the existence of non-local tunneling. Further development of the quasi ballistic model is necessary to include this non-local effect.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130224491","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Circuit implementation to describe the physical behavior of phase change memory 描述相变存储器物理行为的电路实现
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760753
K. C. Kwong, M. Chan
{"title":"Circuit implementation to describe the physical behavior of phase change memory","authors":"K. C. Kwong, M. Chan","doi":"10.1109/EDSSC.2008.4760753","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760753","url":null,"abstract":"A method to implementation a circuit model to describe the physical properties of phase change memory (PCM) is discussed. Physical effects including self-heating and data retention are described by sub-circuits that used to produce the physical behaviors. Simulations of PCM behaviors during various operation modes are performed with the developed model. The model can be combined with other circuit elements to study a complete PCM circuits including drivers and access circuits.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123339817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
An analytic surface potential based non-charge-sheet poly-Si TFT model including substrate and film thickness effects 基于分析表面电位的非电荷片多晶硅TFT模型，包括衬底和薄膜厚度效应
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760715
Jinhua Hu, Jian Zhang, Lining Zhang, Feng Liu, Jin He
{"title":"An analytic surface potential based non-charge-sheet poly-Si TFT model including substrate and film thickness effects","authors":"Jinhua Hu, Jian Zhang, Lining Zhang, Feng Liu, Jin He","doi":"10.1109/EDSSC.2008.4760715","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760715","url":null,"abstract":"An analytic surface potential based non-charge-sheet model for poly-silicon thin film transistors (poly-Si TFTs) is proposed in this paper with consideration of the substrate and film thickness effects. The 1-D Poissonpsilas equation with dopant, mobile, and the trap charge terms is first solved to obtain accurate yet continuous channel potentials physically. An analytic non-charge-sheet drain current model is then derived from Pao-Sahpsilas dual integral as a function of the channel potentials at the source end and drain end. The extensive comparison between the presented model prediction and the 2-D numerical simulation is done, proving accuracy of the developed model. The presented channel potential relation and the physics based TFT drain current model may be useful for device scientists and circuit engineers to further understand TFT device physics and test TFT circuit performance.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131432317","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
III-nitride heterojunction FETs : Future perspectives 氮化异质结场效应管:未来展望
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760744
M. Kuzuhara
{"title":"III-nitride heterojunction FETs : Future perspectives","authors":"M. Kuzuhara","doi":"10.1109/EDSSC.2008.4760744","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760744","url":null,"abstract":"III-nitride electron devices are attracting considerable attention for future wireless communication equipments and power electronics systems. This paper gives an overview on the state-of-the-art performance of AlGaN/GaN heterojunction FETs and describes some key issues concerning further improvements in the device performance. Focus is also on the future perspectives of III-nitride-based transistor applications.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132311925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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