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2008 IEEE International Conference on Electron Devices and Solid-State Circuits最新文献

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Effective channel length increased due to switching from ≪110≫ to ≪100≫ orientation for PMOS transistors fabricated by 65 nm CMOS technology 采用65纳米CMOS技术制造的PMOS晶体管的有效通道长度由于从《110》转向《100》而增加
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760686
W. Lau, Peizhen Yang, V. Ho, B. K. Lim, S. Siah, L. Chan
{"title":"Effective channel length increased due to switching from ≪110≫ to ≪100≫ orientation for PMOS transistors fabricated by 65 nm CMOS technology","authors":"W. Lau, Peizhen Yang, V. Ho, B. K. Lim, S. Siah, L. Chan","doi":"10.1109/EDSSC.2008.4760686","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760686","url":null,"abstract":"The on-state current of PMOS transistors fabricated on (100) Si substrate can be easily increased by switching from <110> to <100> orientation because of faster hole transport. In addition, PMOS transistors also become slightly ldquolongerrdquo. An experimental estimation of the increase of the effective channel length of the order of nm was made in PMOS transistors fabricated by 65 nm low-power CMOS technology. This can cause a noticeable drop in off current for short PMOS transistors.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131286488","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A modified high-performance structure of low-voltage CMOS Op-amp 一种改进的高性能低压CMOS运算放大器结构
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760687
A. Ahmadpour, R. Fouladi
{"title":"A modified high-performance structure of low-voltage CMOS Op-amp","authors":"A. Ahmadpour, R. Fouladi","doi":"10.1109/EDSSC.2008.4760687","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760687","url":null,"abstract":"A modified high-performance structure of low-voltage CMOS folded-cascode op-amp for switched-capacitor (SC) applications, with a 50 MHZ clock-frequency and a single 2V supply voltage, is presented. The proposed two-stage OTA is a A/AB class that combines a novel rail-to-rail folded-cascode as the first-stage with active current mirrors as the second stage. Due to the AB class operation in the second stage, slew limiting only occurs in the first stage, So, it cause lower power dissipation for SC circuits. Also, it employs the cascode compensation scheme for fast settling. Using the proposed methodology, the optimum values for the op-amp device sizes of all stages are determined in order to optimize all of the characteristics. Trade-offs among such factors as bias-current, speed, noise and power-dissipation are made evident. This op-amp is designed in 0.18 um and 0.35 um CMOS (level 49) twin-well TSMC process, and is simulated with Hspice. Finally, this structure is checked for a typical switched-capacitor integrator, and with all process corners from -50degc to +100degc.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125051503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Buck converter controlled by using variable switching frequency technique 采用可变开关频率技术控制Buck变换器
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760711
A. Julsereewong, S. Pongswatd, P. Julsereewong, K. Tirasesth, H. Sasaki, Y. Shi
{"title":"Buck converter controlled by using variable switching frequency technique","authors":"A. Julsereewong, S. Pongswatd, P. Julsereewong, K. Tirasesth, H. Sasaki, Y. Shi","doi":"10.1109/EDSSC.2008.4760711","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760711","url":null,"abstract":"In this paper, a linearly tunable voltage controlled oscillator with negatively proportional characteristic, termed VCOTheta, is described. Using the VCOTheta and analog PI controller in feedback path of a buck converter operating in continuous condition mode, a control technique with variable switching frequency is presented. No filtering capacitor is required in the proposed technique that provides the advantage of a simple and compact structure. Experimental results show that the output voltage ripple can be reduced. The output voltage regulation can be also kept in constant without stability problems.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"207 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132387264","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Study of microscopic defects in silicon oxynitride films prepared by plasma-enhanced chemical vapor deposition process 等离子体增强化学气相沉积法制备氮化硅薄膜的微观缺陷研究
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760636
W. Tam, C. Wong, C. Kok
{"title":"Study of microscopic defects in silicon oxynitride films prepared by plasma-enhanced chemical vapor deposition process","authors":"W. Tam, C. Wong, C. Kok","doi":"10.1109/EDSSC.2008.4760636","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760636","url":null,"abstract":"This work studies the microscopic defects in oxynitride films prepared by plasma-enhanced chemical vapor deposition (PECVD) technique. X-ray photoelectron spectroscopy (XPS) study indicates that the silicon atoms in the films are randomly bonded with nitrogen and oxygen atoms. Photoluminescence measurements were conducted to study the radiative defect centers in the oxynitride films and found that the oxynitride films have a significant amount of non-bridging oxygen defects. Fourier Transform Infrared (FTIR) measurements indicate that the as-deposited films contain significant amount of hydrogen and OH groups.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114636569","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Modeling of avalanche gain for high-speed InP/InGaAs avalanche photodiodes 高速InP/InGaAs雪崩光电二极管雪崩增益建模
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760679
J.K. Park, I. Yun
{"title":"Modeling of avalanche gain for high-speed InP/InGaAs avalanche photodiodes","authors":"J.K. Park, I. Yun","doi":"10.1109/EDSSC.2008.4760679","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760679","url":null,"abstract":"InP/InGaAs avalanche photodiodes (APDs) have been widely used for high-speed optical receivers because of their advantages of high avalanche gain and high sensitivity. Generally, avalanche photodiodes are operated at near the breakdown voltage to improve gain characteristic. However, process variations of APD can cause the fluctuations of characteristics, such as avalanche gain, breakdown voltage, and dark current, which degrade proper operating characteristics of APDs. In this paper, the characteristic variations of InP/InGaAs avalanche photodiodes are investigated using commercial TCAD tool.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116290519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Multifractal behavior of the power dissipation of CMOS circuits CMOS电路功耗的多重分形行为
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760642
W. Qiang, H. Cao
{"title":"Multifractal behavior of the power dissipation of CMOS circuits","authors":"W. Qiang, H. Cao","doi":"10.1109/EDSSC.2008.4760642","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760642","url":null,"abstract":"Power dissipations of complementary metal-oxide-semiconductor (CMOS) circuits under randomly generated input vector streams are found to characterize the multifractality. The multifractal behaviors have been demonstrated by box-counting method on ISCAS-85 benchmark circuits with various scales and under different average power dissipations. The range of the scaling invariance spans nearly four decades. The self-affine generalized fractal dimensions and the multifractal spectra are presented. The generalized fractal dimensions decrease with the increasing moment orders. The multifractal spectra are concave downward with maximums at the moment order of zero. The average power dissipations and the scales of the circuits are related to the range of singularity by power laws.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"328 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124631294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Resonant MEMS sensors for detection of aqueous heavy metal ions with Sub-ppm resolution 用于检测水中重金属离子的共振MEMS传感器，分辨率为ppm以下
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760702
A. Rahafrooz, S. Pourkamali
{"title":"Resonant MEMS sensors for detection of aqueous heavy metal ions with Sub-ppm resolution","authors":"A. Rahafrooz, S. Pourkamali","doi":"10.1109/EDSSC.2008.4760702","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760702","url":null,"abstract":"This work presents a new approach for detection of trace amounts of heavy metal ions in water samples using capacitive silicon resonators as ultra-sensitive mass sensors. This approach is based on reduction of metal ions by the silicon in a resonant structure and consequently deposition of a very thin metal layer on the resonator surface changing its resonant frequency. Preliminary measurements demonstrate successful detection of sub-ppm concentrations of copper(II) ions in water. Relatively large frequency shifts (hundreds of ppm) have been measured for resonators exposed to copper concentrations as low as 4 muM (0.26 ppm). This corresponds to a few atomic layers of copper (~5 Aring thick) deposited on the resonator surface.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129448647","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Universal high voltage multiplexer for CMOS OTP memory applications 用于CMOS OTP存储器应用的通用高压多路复用器
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760688
K. P. Ng, M.C. Lee, Wan-Tim Chan, R. Barsatan, M. Chan
{"title":"Universal high voltage multiplexer for CMOS OTP memory applications","authors":"K. P. Ng, M.C. Lee, Wan-Tim Chan, R. Barsatan, M. Chan","doi":"10.1109/EDSSC.2008.4760688","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760688","url":null,"abstract":"A CMOS-compatible high voltage multiplexer (HV MUX) for zero-additional-mask CMOS one time programmable (OTP) memory array mask is presented. The HV MUX uses standard CMOS with low input voltage and produce high output voltage beyond the VDD allowed by the process for programming the OTP memory array. By limiting the instantaneous voltage between any two nodes, the HV MUX can tolerate the high voltages for programming without sacrificing reliability. Two configurations of CMOS OTP memory array using the HV MUX are presented and simulated to confirm the functionality of the design.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125572880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A New data coding method for wireless command transmission BPSK modulator in implantable neural signal acquisition system 植入式神经信号采集系统中BPSK调制器无线指令传输的数据编码新方法
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760682
Z. Lianga, B. LIa, Z.H. Wua
{"title":"A New data coding method for wireless command transmission BPSK modulator in implantable neural signal acquisition system","authors":"Z. Lianga, B. LIa, Z.H. Wua","doi":"10.1109/EDSSC.2008.4760682","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760682","url":null,"abstract":"In wireless implantable neural signal acquisition system, the transmitting of the configuration data to the internal module needs high reliability. Therefore, differential coding is often used in this data transmitting system. However, it requires highly reliable clock synchronization between the internal and external system, leading to the design extremely difficult. To solve this problem, a new data encoding method based on pulse width modulation is presented in this paper to make the internal and external modules can work at asynchronous system clocks with a clock detector designed to make the internal device fit the different clock frequencies. The new coding method is shown to be successful by a board circuit system and the testing results.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114349770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Characteristics of La2O3 gate dielectric film with Al implantation using plasma immersion ion implantation 等离子体浸没离子注入Al的La2O3栅极介质膜的特性
2008 IEEE International Conference on Electron Devices and Solid-State Circuits Pub Date : 2008-12-01 DOI: 10.1109/EDSSC.2008.4760674
B. Sen, H. Wong, P. Chu, K. Kakushima, H. Iwai
{"title":"Characteristics of La2O3 gate dielectric film with Al implantation using plasma immersion ion implantation","authors":"B. Sen, H. Wong, P. Chu, K. Kakushima, H. Iwai","doi":"10.1109/EDSSC.2008.4760674","DOIUrl":"https://doi.org/10.1109/EDSSC.2008.4760674","url":null,"abstract":"In this work, the effects of aluminum implantation on thin La2O3 films grown by e-beam evaporation have been investigated using x-ray photoelectron spectroscopy (XPS), current-voltage (I-V) and capacitance-voltage (C-V) measurements. The small amount of aluminum incorporated (~ 6% near the surface) in the oxide film greatly modifies both material and electrical properties of the dielectric. Reduction in the leakage current (by four orders of magnitude) and the flatband voltage shift are indications of significant removal of the bulk traps from the oxide. The steep transition from the depletion region to the accumulation region in the CV characteristics as well as the XPS results reveal the stoichiometric improvement of the interfacial layer with a reduction in the interface state density. However, the annealing conditions need to be optimized in order to have maximum reduction in oxide traps and leakage current in the Al-PIII La2O3 film.","PeriodicalId":234055,"journal":{"name":"2008 IEEE International Conference on Electron Devices and Solid-State Circuits","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122554968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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