Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems最新文献_第3页

Parallel-T-diode switched-capacitor Parallel-T-diode开关电容

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514620

Y. Takeishi, T. Takeishi

引用次数: 0

Dynamic channel assignment with reuse partitioning in cellular radio systems 蜂窝无线电系统中具有复用划分的动态信道分配

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514523

K. Shimada, T. Watanabe, M. Sengoku, T. Abe, S. Shinoda

引用次数: 0

Performance analysis of multichannel reservation random access protocol for mobile cellular network 移动蜂窝网络多通道预约随机接入协议的性能分析

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514522

Jae-Soo Kim, I. Hwang

引用次数: 0

A new fault simulator for large synchronous sequential circuits 一种新的大型同步顺序电路故障模拟器

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514595

J. Jou, Shung-Chih Chen

引用次数: 2

Area-time optimal digital BiCMOS carry look-ahead adder 区域时间最优的数字BiCMOS带前视加法器

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514534

C. Chen, Anup Kumar

{"title":"Area-time optimal digital BiCMOS carry look-ahead adder","authors":"C. Chen, Anup Kumar","doi":"10.1109/APCCAS.1994.514534","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514534","url":null,"abstract":"Previous research in VLSI adders has identified the existence of tradeoffs between asymptotic area and asymptotic time. This paper presents a systematic method of implementing a BiCMOS carry look-ahead adder design which is optimized with respect to area and time. Since the adder circuits usually lie on the critical path delay of carry generator due to large fan-out and output capacitances, speed determines the clock cycle time. In view of the driving capability of bipolar transistors, the BiCMOS buffer/driver and BiCMOS cells are chosen and modified to drive large fan-out or heavy capacitive loads. Combining the bipolar and CMOS circuits on a single chip, the performance of the carry generator circuit is improved due to the acceleration of the critical path. A comparison between BiCMOS and CMOS parallel adders is made. It is shown that the parallel adders designed using the BiCMOS cells achieved improvement in the performance, by shortening the critical path delay by 32.486% in the case of 16-bit, 58.365% in the case of 32-bit and 79.944% in the case of 66-bit where the delay is calculated as the average propagation delay measured from HSPICE simulations.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114053750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Design of clustering analyzer based on systolic array architecture 基于收缩阵列结构的聚类分析仪设计

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514526

Mao-Fu Lai, Yan-Pei Wu, C. Hsieh

引用次数: 3

CMOS implementation of neural networks for speech recognition 用于语音识别的神经网络的CMOS实现

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514603

I. Jou, Ron-Yi Liu, Chung-Yu Wu

引用次数: 4

Minimizing via coupled noise in high performance thermal conduction module design 在高性能热传导模块设计中最大限度地减少通过耦合噪声

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514610

H.H. Chen, C. K. Wong

引用次数: 0

Audio visual coding technologies and LSI circuits based on MPEG2 standard to implement multimedia services 音视频编码技术和基于MPEG2标准的LSI电路实现多媒体业务

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514513

H. Yasuda

引用次数: 1

Design and analysis of fourth-order leapfrog topologies for sigma-delta A/D converters σ - δ A/D转换器的四阶跳越拓扑设计与分析

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514598

Wen-Bin Lin, T. Kuo, Chuen-Hsien Su, Ji-Rong Chen

{"title":"Design and analysis of fourth-order leapfrog topologies for sigma-delta A/D converters","authors":"Wen-Bin Lin, T. Kuo, Chuen-Hsien Su, Ji-Rong Chen","doi":"10.1109/APCCAS.1994.514598","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514598","url":null,"abstract":"A novel design and analysis method for a 4th-order sigma-delta modulator (SDM or DSM) based on leapfrog topologies is presented. First, we discuss the arrangement of delayed and non-delayed type integrators for the leapfrog topologies and then determine a stable topology for analysis. Using the theoretical analysis including DC analysis and the relationship of roots and coefficients of an equation, the ranges of the loop coefficients which stabilize the system are determined. The numerical analysis is then adopted to analyze the ranges of the loop coefficients. According to the above analysis methods, the stable regions in frequency domain are easily determined. From these stable regions, a set of coefficients for VLSI implementation is chosen. The chosen loop coefficients of the leapfrog topologies are very simple and such that circuit complexity is reduced, To component variations, the performance of leapfrog SDM is less sensitive than that of leapfrog filter. Hence, circuit design becomes simpler and more effective. Behavior simulation shows that a 4th-order leapfrog topology can achieve the inband signal-to-noise ratio (SNR) more than 110 dB and the dynamic range (DR) more than 110 dB for 640 oversampling ratio. Besides, it also shows that both the gain ripple for inband signal and group delay variation are negligible, Hence, the leapfrog topologies can be used in ultra-high resolution signal processing system such as speech application, codec in digital cellular phone, and high precision measurement equipment.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115045912","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2