Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems最新文献

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Symmetric properties of 2-D sequences and their applications for designing quadrantally symmetric linear-phase 2-D FIR digital filters 二维序列的对称性质及其在设计方形对称线性相位二维FIR数字滤波器中的应用
Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514589
S. Pei, Jong-Jy Shyu
{"title":"Symmetric properties of 2-D sequences and their applications for designing quadrantally symmetric linear-phase 2-D FIR digital filters","authors":"S. Pei, Jong-Jy Shyu","doi":"10.1109/APCCAS.1994.514589","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514589","url":null,"abstract":"In this paper, various symmetric and antisymmetric 2-D sequences are used to design quadrantally symmetric/antisymmetric 2-D filters. It is shown that there are sixteen types cases to be considered according to the symmetry/antisymmetry of 2-D sequences in both directions and their filter lengths (even or odd).","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126522835","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimized secondary path modeling technique for active noise control systems 主动噪声控制系统的优化二次路径建模技术
Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514578
S. Kuo, D. Vijayan
{"title":"Optimized secondary path modeling technique for active noise control systems","authors":"S. Kuo, D. Vijayan","doi":"10.1109/APCCAS.1994.514578","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514578","url":null,"abstract":"This paper presents a secondary path modeling technique for active noise control (ANC) systems. The optimum delay for the adaptive prediction error filter to reduce the interference in system modeling is derived. This delay is determined by the length of the impulse response of the secondary path to be modeled. The modeling technique developed in this paper can be applied for both on-line and off-line modeling with faster convergence and higher modeling accuracy when primary noise and other interference exist.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128055296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Field-programmable multi-chip module (FPMCM) for high-performance DSP accelerator 用于高性能DSP加速器的现场可编程多芯片模块(FPMCM)
Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514538
T. Isshiki, W. Wei-Ming Dai
{"title":"Field-programmable multi-chip module (FPMCM) for high-performance DSP accelerator","authors":"T. Isshiki, W. Wei-Ming Dai","doi":"10.1109/APCCAS.1994.514538","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514538","url":null,"abstract":"We have described our work on FPMCM-I which integrates multiple FPGA chips by MCM technology, significantly increasing the logic capacity, reducing power consumption and speeding up the chip-to-chip communication. In the second part of the paper, we have described our bit-serial datapath circuit designs and their advantages over bit-parallel circuits on FPGA implementation. We have given some circuit layout examples of 2D FIR filter and IDCT circuits which demonstrates the efficiency of bit-serial circuits in terms of logic resource utilization, routability, IO pin utilization and performance.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115967732","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
VLSI implementation of a generic discrete transform processor for real-time applications VLSI实现的一种通用离散变换处理器,用于实时应用
Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514528
C. Chiu, K.H. Tsui
{"title":"VLSI implementation of a generic discrete transform processor for real-time applications","authors":"C. Chiu, K.H. Tsui","doi":"10.1109/APCCAS.1994.514528","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514528","url":null,"abstract":"A function-specific VLSI chip that can compute the discrete cosine, sine, Fourier, and Hartley transforms in a real-time manner is presented. A generic transform processor based on the transfer function approach for those discrete transforms is described. This processor is well suited for VLSI implementation because it is modular, regular, local connected and without ally limitation on transform size N. The VLSI implementation of the transform processor based on pipelined configurations is described. This realization of the processor using 0.8 /spl mu/m SPDM CMOS technology can achieve a 544 Mb/s data processing rate.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134410731","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A new approach to the design of pulse shaping FIR filters 一种设计脉冲整形FIR滤波器的新方法
Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514557
Shiuh-Ku Weng, Jong-Jy Shyu
{"title":"A new approach to the design of pulse shaping FIR filters","authors":"Shiuh-Ku Weng, Jong-Jy Shyu","doi":"10.1109/APCCAS.1994.514557","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514557","url":null,"abstract":"An efficient method is presented for designing pulse shaping FIR digital filters in this paper. It is known that for avoiding intersymbol interference (ISI), certain time-domain constraints for designing optimal pulse shaping filters should be considered. In this paper, the Lagrange multiplier approach is applied, and the constraints are easy to incorporate into the design procedures, which makes the method attractive for designing pulse shaping filters. Comparing with the existing methods, the method is simple and effective. Numerical design examples such as Nyquist filters and partial response filters are presented to demonstrate the usefulness and flexibility of the method.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"2012 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127396465","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Nonlinear digital filters for image restoration using Volterra series 非线性数字滤波器的图像恢复使用Volterra系列
Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514630
H. Yoshida, K. Atsuta, S. Kondo
{"title":"Nonlinear digital filters for image restoration using Volterra series","authors":"H. Yoshida, K. Atsuta, S. Kondo","doi":"10.1109/APCCAS.1994.514630","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514630","url":null,"abstract":"In this paper, we propose new nonlinear digital filters for image processing which are represented by discrete Volterra series. Firstly a design theory of nonlinear filters is formulated as an identification problem of unknown filters using pairs of input and output images of the filters. Secondly a nonlinear filter for image restoration is designed as an example of the proposed design method. Finally the designed filter is used to restore another image degraded in the same manner. It supports that the proposed design method is quite efficient.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115529989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and implementation of linear-phase 2-channel perfect reconstruction FIR filter banks with equiripple stopband 带等纹阻带的线性相位2通道完全重构FIR滤波器组的设计与实现
Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514558
T. Nagai, M. Ikehara
{"title":"Design and implementation of linear-phase 2-channel perfect reconstruction FIR filter banks with equiripple stopband","authors":"T. Nagai, M. Ikehara","doi":"10.1109/APCCAS.1994.514558","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514558","url":null,"abstract":"This paper presents a design and implementation method for linear phase 2-channel perfect reconstruction FIR filter banks with arbitrary filter length. In this method, which we call the weighted Lagrange-Newton method, by introducing the least squares weighting function into Horng's method (Lagrange-Newton method), QMF (Quadrature Mirror Filters) with good stopband attenuation can be designed. Furthermore, we show the construction of a 2-channel perfect QMF that achieves perfect reconstruction in spite of coefficient quantization.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"467 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115943455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A handshake protocol for CDMA wireless LANs with error control capabilities 具有错误控制功能的CDMA无线局域网握手协议
Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514521
S.J. Jiang, W. Weng, L. Lin
{"title":"A handshake protocol for CDMA wireless LANs with error control capabilities","authors":"S.J. Jiang, W. Weng, L. Lin","doi":"10.1109/APCCAS.1994.514521","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514521","url":null,"abstract":"Observing the threshold effect of CDMA systems, this paper proposes a simple, fair protocol suitable for the CDMA environment, which does not need the additional feedback channel but can still achieve the goal of error control. Based on the same rationale as the CSMA/CD protocol, this protocol is designed to avoid collision or congestion of traffic before formal transmission of a packet. By the handshake procedure, the intended transmitter is able to test the channel quality and the receiver's status using a very short handshake packet. Therefore, channel traffic can be controlled to avoid overload. The throughput and reliability are analyzed based on the underlying Markovian models. Numerical results are compared to other error control schemes and show that with a reasonably short handshake time compared to the packet transmission time, this handshake protocol with simple forward error correction offers an excellent alternative for error control and can even improve the throughput performance.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124535040","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Progressive and constant-speed order filtering neural network 渐进式等速阶滤波神经网络
Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514516
Chi-Ming Chen, J. Yang
{"title":"Progressive and constant-speed order filtering neural network","authors":"Chi-Ming Chen, J. Yang","doi":"10.1109/APCCAS.1994.514516","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514516","url":null,"abstract":"In this paper, a new order filtering neural network, which can select a specific ordered value from all inputs, is developed and analyzed. The proposed neural net in two-layer structure iteratively converges to the solution with low and constant convergent speed, which is independent of the number of inputs. With progressive behavior, the proposed neural net obtains the more accurate result when the number of iterations increases if the derived convergent condition is satisfied. From the view points of convergence speed and hardware complexity, the proposed order filtering neural network is suitable for various applications.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117269615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A simple FPGA-based conjugate search motion estimator 一个简单的基于fpga的共轭搜索运动估计器
Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI: 10.1109/APCCAS.1994.514533
S. Kumar, V. Haniyur, C. Choo, R. Chen
{"title":"A simple FPGA-based conjugate search motion estimator","authors":"S. Kumar, V. Haniyur, C. Choo, R. Chen","doi":"10.1109/APCCAS.1994.514533","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514533","url":null,"abstract":"Conjugate search is an efficient motion estimation algorithm based on block matching for video compression. This paper presents our ongoing work to develop the prototype of the conjugate search motion estimation hardware. So far, we have implemented a simplified version of the conjugate search motion estimation algorithm using field programmable gate arrays. Simulation results indicate that the performance of this hardware is comparable to the one based on full-search algorithm, while hardware is much simpler.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116192811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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