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Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.最新文献

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Polychrony for formal refinement-checking in a system-level design methodology 系统级设计方法中用于正式细化检查的多时性
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207695
J. Talpin, P. Guernic, S. Shukla, Rajesh K. Gupta, F. Doucet
{"title":"Polychrony for formal refinement-checking in a system-level design methodology","authors":"J. Talpin, P. Guernic, S. Shukla, Rajesh K. Gupta, F. Doucet","doi":"10.1109/CSD.2003.1207695","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207695","url":null,"abstract":"The productivity gap incurred by the rising complexity of system-on-chip design have necessitated newer design paradigms to be introduced based on system-level design languages. A gating factors for widespread adoption of these new paradigms is a lack of formal tool support of refinement based design. A system level representation may be refined manually (in absence of adequate behavioral synthesis algorithms and tools) to obtain an implementation, but proving that the lower level representation preserves the correctness proved at higher level models is still an unsolved problem. We address the issue of formal refinement proofs between design abstraction levels using the concepts of polychronous design. Refinement of synchronous high-level designs into globally asynchronous and locally synchronous architectures is formally supported in this methodology. The polychronous (i.e. multiclocked) model of the SIGNAL design language offers formal support for the capture of behavioral abstractions for both very high-level system descriptions (e.g. SYSTEMC/SPEcC,) and behavioral-level IP components (e.g. VHDL). Its platform, polychrony, provides models and methods for a rapid, refinement-based, integration and a formal conformance-checking of GALS hardware/software architectures. We demonstrate the effectiveness of our approach by the experimental, comparative, case study of an even-parity checker design in SPEcC. It highlights the benefits of the formal models, methods and tools provided in polychrony, in representing functional, architectural, communication and implementation abstractions of the design, and the successive refinements.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116928631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 39
Logic of involved variables - system specification with temporal logic of distributed actions 涉及变量的逻辑-系统规范与分布式动作的时间逻辑
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207711
A. Alexander, W. Reisig
{"title":"Logic of involved variables - system specification with temporal logic of distributed actions","authors":"A. Alexander, W. Reisig","doi":"10.1109/CSD.2003.1207711","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207711","url":null,"abstract":"The temporal logic of distributed actions (TLDA) is a new temporal logic designed for the specification and verification of distributed systems. TLDA can be syntactically viewed as a slight extension of TLA. We propose a different semantical model based on partial order which evidently increases the expressiveness of the logic. Local variable updates in a system are explicitly modeled and expressed by TLDA formulas. Consequently, we can distinguish between concurrency and nondeterministic choice. All valuable features of TLA (composition is conjunction, implementation is implication) are retained. In addition, we are able to describe some important phenomena and properties typical for distributed systems.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125043928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Compositional high level Petri nets with timing constraints - a comparison 具有时间约束的合成高级Petri网-比较
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207707
E. Pelz, H. Fleischhack
{"title":"Compositional high level Petri nets with timing constraints - a comparison","authors":"E. Pelz, H. Fleischhack","doi":"10.1109/CSD.2003.1207707","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207707","url":null,"abstract":"We aim at comparing various timed extensions of a fully compositional class of high-level Petri nets, called M-nets. On one hand, as a classical approach, a class of timed M-nets is considered, where intervals of duration are attached to each transition. More precisely, we study this class enriched by the recently introduced hierarchical operation of timed refinement. On the other hand, M-nets enriched by the causal time concept (H. Klaudel et al., 1999); Franck Pommereau, 2002) are considered, they are called causal time M-nets and allow us to introduce timing constraints without extending the original untimed model of M-nets. Causal time M-nets are shown to form the more powerful class. It covers timed and even hierarchical timed M-nets. Moreover, as shown by some significant examples, it permits the modelling of systems involving overlapping timing constraints. Some special cases are quoted where hierarchical timed M-nets may become favorite.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"329 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123398394","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Merging state-based and action-based verification 合并基于状态和基于操作的验证
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207709
Henri Hansen, H. Virtanen, A. Valmari
{"title":"Merging state-based and action-based verification","authors":"Henri Hansen, H. Virtanen, A. Valmari","doi":"10.1109/CSD.2003.1207709","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207709","url":null,"abstract":"A formalism is presented that is intended to combine basic properties of both state-based and action-based verification. In state-based verification the behaviour of the system is described in terms of the properties of its states, whereas action-based methods concentrate on transitions between states. A typical state-based approach consists of representing requirements as temporal logic formulae, and model-checking the state space of the system against them. Action-based verification often consists of comparing systems according to some equivalence or preorder relation. We add state propositions to a typical process-algebraic action framework. Values of state propositions are propagated through process-algebraic compositions and reductions by augmenting actions with changes of proposition values. A modified parallel composition operator is used for synchronisation of processes and handling of state propositions. Efficient on-the-fly verification is obtained with four kinds of rejection conditions. The formalism is implemented in a new verification tool TVT.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"87 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128949215","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
HiWorD: a Petri net-based hierarchical workflow designer HiWorD:一个基于Petri网的分层工作流设计器
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207720
B. Benatallah, Piotr Chrzastowski-Wachtel, Rachid Hamadi, M. O'Dell, A. Susanto
{"title":"HiWorD: a Petri net-based hierarchical workflow designer","authors":"B. Benatallah, Piotr Chrzastowski-Wachtel, Rachid Hamadi, M. O'Dell, A. Susanto","doi":"10.1109/CSD.2003.1207720","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207720","url":null,"abstract":"Much work is being conducted in the area of business process modeling using workflow technology. HiWorD is a hierarchical workflow modeling prototype with simulation capability. It models business processes using Petri nets in a hierarchical manner and implements recovery transitions as a technique to recover from exceptions. The workflow hierarchy is created by refining places and transitions using predefined patterns. By using these patterns, it is proven that the resulting workflow will be sound.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128408939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Rialto profile in the SMW toolkit SMW工具包中的Rialto配置文件
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207719
Dag Björklund, J. Lilius, Ivan Porres
{"title":"Rialto profile in the SMW toolkit","authors":"Dag Björklund, J. Lilius, Ivan Porres","doi":"10.1109/CSD.2003.1207719","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207719","url":null,"abstract":"We present an extension to the System Modeling Workbench to transform UML behavioral diagrams into specifications in Rialto. Rialto is a behavioral description language with formally defined semantics that supports multiple models of computation and can be compiled into compact code in different target languages.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131514191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
The reality of system design today: do theory and practice meet? 当今系统设计的现实:理论与实践相符吗?
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207692
G. Martin
{"title":"The reality of system design today: do theory and practice meet?","authors":"G. Martin","doi":"10.1109/CSD.2003.1207692","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207692","url":null,"abstract":"ACSD aims to be a forum \"for disseminating advanced research results on theory and practice of design of concurrent systems\". We look at the reality of system design as practiced in industry today and what the needs as expressed and demonstrated by designers actually are. Most industrially successful applications of system design concepts and tools are in distinct design niches, and generic methods and tools have not yet been found which apply to a wide range of systems. We look at these niche applications, especially those driven by system-on-chip design, and identify the barriers to wider adoption of known results and methods. In addition, we try to anticipate the nature of future architectures for highly-concurrent systems, and speculate on the system design needs that may be exposed by them.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127697002","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
ABTOOLS: another B tool ABTOOLS:另一个B类工具
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207718
J. Boulanger
{"title":"ABTOOLS: another B tool","authors":"J. Boulanger","doi":"10.1109/CSD.2003.1207718","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207718","url":null,"abstract":"ABTools (B. Jean-Louis, 2001) provides an open environment based on ANTLR and Java and provides some facilities for design and test an extension for the B language. The formal B method is a 'model-based' formal method like Z or VDM but, unlike others, B allows an incremental process development starting from abstract specification to (automatically generated) code. We are particularly concerned by the fact that this process is covered by one and only one language: the Abstract Machine Notation (AMN).","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122649455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
ConfRes: interactive coding conflict resolver based on core visualisation ConfRes:基于核心可视化的交互式编码冲突解决器
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207724
A. Madalinski
{"title":"ConfRes: interactive coding conflict resolver based on core visualisation","authors":"A. Madalinski","doi":"10.1109/CSD.2003.1207724","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207724","url":null,"abstract":"The tool presented supports manual resolution of coding conflicts in asynchronous circuit specification given as signal transition graphs (STGs) and displays them as partial orders (finite and complete prefixes of STG unfoldings). The manual approach although efficient requires a significant effort from the designer. The tool ConfRes assists the designer by visualising the conflict cores, their superposition and the constraints on signal insertion.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125381974","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
C-Sim version 5.0 C-Sim 5.0版本
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207717
R. Jokl, S. Racek
{"title":"C-Sim version 5.0","authors":"R. Jokl, S. Racek","doi":"10.1109/CSD.2003.1207717","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207717","url":null,"abstract":"We present the C-Sim simulation tool that enables an experimental evaluation (i.e. testing) of parallel and distributed programs behavior using their close-to-reality C-language source code and a simulated operational environment.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124883368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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