{"title":"ConfRes:基于核心可视化的交互式编码冲突解决器","authors":"A. Madalinski","doi":"10.1109/CSD.2003.1207724","DOIUrl":null,"url":null,"abstract":"The tool presented supports manual resolution of coding conflicts in asynchronous circuit specification given as signal transition graphs (STGs) and displays them as partial orders (finite and complete prefixes of STG unfoldings). The manual approach although efficient requires a significant effort from the designer. The tool ConfRes assists the designer by visualising the conflict cores, their superposition and the constraints on signal insertion.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"ConfRes: interactive coding conflict resolver based on core visualisation\",\"authors\":\"A. Madalinski\",\"doi\":\"10.1109/CSD.2003.1207724\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The tool presented supports manual resolution of coding conflicts in asynchronous circuit specification given as signal transition graphs (STGs) and displays them as partial orders (finite and complete prefixes of STG unfoldings). The manual approach although efficient requires a significant effort from the designer. The tool ConfRes assists the designer by visualising the conflict cores, their superposition and the constraints on signal insertion.\",\"PeriodicalId\":228530,\"journal\":{\"name\":\"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-06-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSD.2003.1207724\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSD.2003.1207724","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
ConfRes: interactive coding conflict resolver based on core visualisation
The tool presented supports manual resolution of coding conflicts in asynchronous circuit specification given as signal transition graphs (STGs) and displays them as partial orders (finite and complete prefixes of STG unfoldings). The manual approach although efficient requires a significant effort from the designer. The tool ConfRes assists the designer by visualising the conflict cores, their superposition and the constraints on signal insertion.