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Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.最新文献

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CAST - a task-level concurrency analysis tool CAST——一个任务级并发分析工具
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207721
S. Stuijk, T. Basten, Jan Ypma
{"title":"CAST - a task-level concurrency analysis tool","authors":"S. Stuijk, T. Basten, Jan Ypma","doi":"10.1109/CSD.2003.1207721","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207721","url":null,"abstract":"CAST is a system-level software tool for target-architecture-independent concurrency optimization of streaming applications. It includes a design exploration method to guide a system designer in an intuitive way through the design-space.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128106728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
BHDL: circuit design in B BHDL: B中的电路设计
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207723
A. Aljer, P. Devienne, S. Tison, J. Boulanger, G. Mariano
{"title":"BHDL: circuit design in B","authors":"A. Aljer, P. Devienne, S. Tison, J. Boulanger, G. Mariano","doi":"10.1109/CSD.2003.1207723","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207723","url":null,"abstract":"The main goal of this project is to provide a method of correct design of digital circuit. It combines the advantages of VHDL, the well-known language of circuit design, with the power of B method that guarantees the correct design (w.r.t. a formal specification). This allows avoiding the design test since it is \"correct by proven construction\". Furthermore, this project provides a tool, called BHDL, with a graphical interface for creating, editing, viewing and proving modular hardware architectures.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123743135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Quasi-static scheduling for concurrent architectures 并发架构的准静态调度
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207697
J. Cortadella, A. Kondratyev, L. Lavagno, A. Taubin, Yosinori Watanabe
{"title":"Quasi-static scheduling for concurrent architectures","authors":"J. Cortadella, A. Kondratyev, L. Lavagno, A. Taubin, Yosinori Watanabe","doi":"10.1109/CSD.2003.1207697","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207697","url":null,"abstract":"We present a synthesis approach for reactive systems that aims at minimizing the overhead introduced by the operating system and the interaction among the concurrent tasks, while considering multiple concurrent execution resources. A formal model based on the notion of scheduling of Petri nets is used to perform the synthesis. We show how the notion of projections of a schedule for the complete system onto the components implemented on separate resources is essential to define the correctness of the partitioned schedule.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132710826","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Abstract model checking and refinement of temporal logic in /spl alpha/SPIN /spl alpha/SPIN中时间逻辑的抽象模型检验与改进
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207725
M. Gallardo, Jesús Martínez, P. Merino, E. Pimentel
{"title":"Abstract model checking and refinement of temporal logic in /spl alpha/SPIN","authors":"M. Gallardo, Jesús Martínez, P. Merino, E. Pimentel","doi":"10.1109/CSD.2003.1207725","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207725","url":null,"abstract":"We give an overview of the features offered by the tool /spl alpha/SPIN in order to perform abstract model checking of LTL formulas. Shortly, these features are: construction of over-approximated PROMELA models, checking satisfaction of universal formulas, checking refutation of existential formulas, and on-the-fly refinement of the model by means of a refinement of the temporal formula to be verified.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131648771","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Compositional verification of integrity for digital stream signature protocols 数字流签名协议完整性的组合验证
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207708
R. Gorrieri, F. Martinelli, M. Petrocchi, A. Vaccarelli
{"title":"Compositional verification of integrity for digital stream signature protocols","authors":"R. Gorrieri, F. Martinelli, M. Petrocchi, A. Vaccarelli","doi":"10.1109/CSD.2003.1207708","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207708","url":null,"abstract":"We investigate the application of concurrency theory notions as simulation relations and compositional proof rules for verifying digital stream signature protocols. In particular, we formally prove the integrity of the Gennaro-Rohatgi protocols in (R. Gennaro et al., 2001). As a peculiarity, our technique is able to check a protocol with an unbounded number of parallel processes. We argue also that our approach may be applied to a wider class of stream signature protocols.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131046949","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A new synchronization in finite stochastic Petri box calculus 有限随机Petri盒微积分中的一种新的同步
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 2003-06-18 DOI: 10.1109/CSD.2003.1207716
H. Macià, V. V. Ruiz, F. Cuartero, F. Pelayo
{"title":"A new synchronization in finite stochastic Petri box calculus","authors":"H. Macià, V. V. Ruiz, F. Cuartero, F. Pelayo","doi":"10.1109/CSD.2003.1207716","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207716","url":null,"abstract":"The Petri Box Calculus (PBC) combines two well known paradigms of the design of concurrent systems: process algebras and Petri nets. In our first proposal of sPBC (stochastic PBC) [H. Macia et al., (2001)] we defined a Markovian extension of finite PBC, i.e., we had a Markovian process algebra for which both an operational and a denotational (based on stochastic Petri nets) semantics were defined. Our goal is to improve the semantics for the synchronization operator, in order to define a stochastic equivalence relation.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114533024","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Proceedings Third International Conference on Application of Concurrency to System Design. ACSD 2003 第三届并行系统设计国际会议论文集。ACSD 2003
Third International Conference on Application of Concurrency to System Design, 2003. Proceedings. Pub Date : 1900-01-01 DOI: 10.1109/CSD.2003.1207691
{"title":"Proceedings Third International Conference on Application of Concurrency to System Design. ACSD 2003","authors":"","doi":"10.1109/CSD.2003.1207691","DOIUrl":"https://doi.org/10.1109/CSD.2003.1207691","url":null,"abstract":"The following topics are dealt with: system design; formal specification; formal verification; Petri nets; task-level concurrency analysis tool; model checking; temporal logic.","PeriodicalId":228530,"journal":{"name":"Third International Conference on Application of Concurrency to System Design, 2003. Proceedings.","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126154733","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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