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Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)最新文献

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A 15-valued fast test generation for combinational circuits 用于组合电路的15值快速测试发生器
Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS) Pub Date : 1993-11-16 DOI: 10.1109/ATS.1993.398789
S.J. Hong
{"title":"A 15-valued fast test generation for combinational circuits","authors":"S.J. Hong","doi":"10.1109/ATS.1993.398789","DOIUrl":"https://doi.org/10.1109/ATS.1993.398789","url":null,"abstract":"This paper proposes a test generation algorithm which can be applied to practical VLSI circuits. The key idea of the algorithm is to construct a sensitized path from the primary output to the site of the fault. This change of path construction order is very effective especially for the redundant faults, where their fault effects never propagate to any primary output. Whether or not a fault effect propagates can be easily checked by using 15-value logic. In this case, we can save computation time by not processing path sensitization. Another advantage of this approach is that the number of backtracks is greatly reduced by using information on the fault propagation during the path sensitization and line justification processes. This algorithm is implemented in C and is tested with the well-known benchmark circuits. The test results show that the new algorithm is extremely faster than PODEM.<<ETX>>","PeriodicalId":228291,"journal":{"name":"Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131891747","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Computer aided testing system for LC cell's optical properties LC电池光学特性的计算机辅助测试系统
Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS) Pub Date : 1993-11-16 DOI: 10.1109/ATS.1993.398826
Jiang Min, Hu Ximin, Wang Zhongkai, L. Zhihua
{"title":"Computer aided testing system for LC cell's optical properties","authors":"Jiang Min, Hu Ximin, Wang Zhongkai, L. Zhihua","doi":"10.1109/ATS.1993.398826","DOIUrl":"https://doi.org/10.1109/ATS.1993.398826","url":null,"abstract":"This paper introduces our CAT system which is set up for testing the optical properties of LC (liquid crystal) cell. In this system, the transmission spectra of the LC cell at different voltages applied on LC film can be tested by computer control automatically. Simultaneously, the CIE1931 and CIE1971 chromaticity are calculated out in the program.<<ETX>>","PeriodicalId":228291,"journal":{"name":"Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133518978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Effectiveness of stuck-at test sets to detect bridging faults in Iddq environment Iddq环境下卡接测试集检测桥接故障的有效性
Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS) Pub Date : 1993-11-16 DOI: 10.1109/ATS.1993.398813
S. Hwang, R. Rajsuman
{"title":"Effectiveness of stuck-at test sets to detect bridging faults in Iddq environment","authors":"S. Hwang, R. Rajsuman","doi":"10.1109/ATS.1993.398813","DOIUrl":"https://doi.org/10.1109/ATS.1993.398813","url":null,"abstract":"Recently, it has been recognized that logic testing is very inefficient to detect physical defects in CMOS circuits. Most of the physical defects are modeled as bridging and open faults, which are not detected using a stuck-at fault model. In this study, we examined the detect efficiency of stuck-at test sets for bridging faults in Iddq environment. Our stuck-at test vectors are generated by standard ATPG programs. These test vectors are applied while power supply current is monitored. A high current state in the circuit is considered as a presence of a fault. Sets of combinational and sequential circuits are used in this study. The results are given in terms of intra-transistor and gate-level bridging fault coverages.<<ETX>>","PeriodicalId":228291,"journal":{"name":"Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131623544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Application of homing sequences to synchronous sequential circuit testing 归巢序列在同步时序电路测试中的应用
Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS) Pub Date : 1993-11-16 DOI: 10.1109/ATS.1993.398825
I. Pomeranz, S. Reddy
{"title":"Application of homing sequences to synchronous sequential circuit testing","authors":"I. Pomeranz, S. Reddy","doi":"10.1109/ATS.1993.398825","DOIUrl":"https://doi.org/10.1109/ATS.1993.398825","url":null,"abstract":"A test generation procedure for synchronous sequential circuits is proposed, that is based on the multiple observation times approach, and uses homing sequences, instead of conventionally used synchronizing sequences, to initialize the circuit. A procedure for computing homing sequences in sequential circuits, for which a state-table description is too large to be practical, is described, and experimental results are presented to demonstrate the effectiveness of the proposed test generation procedure.<<ETX>>","PeriodicalId":228291,"journal":{"name":"Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125664014","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 35
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