{"title":"On-chip at-speed linearity testing of high-resolution high-speed DACs using DDEM ADCs with dithering","authors":"Hanqing Xing, Degang Chen, R. Geiger","doi":"10.1109/EIT.2008.4554278","DOIUrl":"https://doi.org/10.1109/EIT.2008.4554278","url":null,"abstract":"On-chip testing of high-resolution high-speed DACs is extremely challenging because of the stringent requirements on the accuracy, speed and cost of the measurement circuits. This work proposed a new on-chip strategy for DAC linearity testing applying the proposed deterministic dynamic element matching (DDEM) technique. Low-accuracy two-step flash ADCs are used as test devices. Speed advantage of flash structure enables at-speed testing, while its accuracy and resolution are improved by DDEM algorithm, the second stage and dithering. In this paper, the architecture of the DDEM flash ADC and DDEM algorithm are described. The design consideration of the major circuit blocks are talked about. The test performance is analyzed theoretically and verified by simulation. Simulation shows that a dithering incorporated two-step flash DDEM ADC, which consists of a 6-bit coarse DDEM stage, a 6-bit fine stage and a 5-bit dithering DAC, with linearity of all the blocks only at about 6-bit level, is capable of testing 14-bit DACs.","PeriodicalId":215400,"journal":{"name":"2008 IEEE International Conference on Electro/Information Technology","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127961605","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Use of local biasing in designing analog integrated circuits","authors":"R. Hashemian","doi":"10.1109/EIT.2008.4554279","DOIUrl":"https://doi.org/10.1109/EIT.2008.4554279","url":null,"abstract":"A new biasing technique called ldquolocal biasingrdquo of transistors is used to design analog integrated circuit amplifiers, or any other analog ICs. The technique is based on designing the circuit without any external source but only the sources that are used to locally bias the transistors [12, 13]. Later these sources are transferred to appropriate locations in the circuit which leads the circuit to a new topology and configuration that makes it possible to replace the local biasing sources with final current mirrors and one or two conventional power supplies. Local biasing is revisited, and an OTA design example is provided to clarify the methodology and demonstrate the procedure.","PeriodicalId":215400,"journal":{"name":"2008 IEEE International Conference on Electro/Information Technology","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115542112","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Attempts at gauge determination in superconducting transmission lines","authors":"Ryan M. Gerdes, M. Mina","doi":"10.1109/EIT.2008.4554277","DOIUrl":"https://doi.org/10.1109/EIT.2008.4554277","url":null,"abstract":"The effects of the Coulomb and Lorenz gauges on the field formulation for superconducting transmission lines are examined. While either of the two correctly determines the electromagnetic fields of the structure, it is shown that when certain restrictions, which lead to a more chaste and direct formulation, are placed on the behavior of the magnetic vector potential, a single gauge is preferred, if not indeed forced.","PeriodicalId":215400,"journal":{"name":"2008 IEEE International Conference on Electro/Information Technology","volume":"519 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116259994","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Handheld data protection using handheld usage pattern identification","authors":"Wen-Chen Hu, Yanjun Zuo, T. Wiggen, Varun Krishna","doi":"10.1109/EIT.2008.4554302","DOIUrl":"https://doi.org/10.1109/EIT.2008.4554302","url":null,"abstract":"Mobile handheld devices such as smart cellular phones and personal digital assistants (PDAs) are easily lost because of their small sizes and high mobility. Personal data like addresses and telephone numbers stored in the devices are revealed when the devices are lost. This research proposes a novel approach of applying handheld usage pattern identification to handheld data protection. Handheld usage data is collected before applying this method. Usage patterns are discovered and saved by using a finite automaton, which is then used to check device usage. When an unusual usage pattern such as an unlawful user trying to access the handheld data is detected, the device will automatically lock itself down until an action, like entering a password, is taken. Preliminary experimental results show this method is effective and convenient for handheld data protection.","PeriodicalId":215400,"journal":{"name":"2008 IEEE International Conference on Electro/Information Technology","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114702366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Biochemical sensing of charged polyelectrolytes with a novel CMOS floating-gate device architecture","authors":"Baozhen Chen, C. Tao, S. William, Santosh Pandey","doi":"10.1109/EIT.2008.4554318","DOIUrl":"https://doi.org/10.1109/EIT.2008.4554318","url":null,"abstract":"Novel CMOS device is proposed as a biochemical sensor. We modified the basic architecture of an extended floating-gate field-effect transistor (FET) to be suited for VLSI applications. The FET has a floating-gate that is umbrella-shaped (UGFET), maximizing its charge sensing area in a much reduced transistor area. Compared to previous extended floating-gate structures, the UGFET shows improved scalability and sensitivity. 3-D device simulations validate the UGFET model. The design is fabricated in a standard CMOS process and characterized. Experimental results are presented employing transconductance and subthreshold measurement schemes which confirm its high sensitivity and workability.","PeriodicalId":215400,"journal":{"name":"2008 IEEE International Conference on Electro/Information Technology","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126237028","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Computation of Voronoi diagrams using a graphics processing unit","authors":"Igor Majdandzic, C. Trefftz, G. Wolffe","doi":"10.1109/EIT.2008.4554342","DOIUrl":"https://doi.org/10.1109/EIT.2008.4554342","url":null,"abstract":"A parallel algorithm to compute a discrete approximation to the Voronoi diagram is presented. The algorithm, which executes in single instruction multiple data (SIMD) mode, was implemented on a high-end graphics processing unit (GPU) using NVIDIApsilas compute unified device architecture (CUDA) development environment. The performance of the resulting code is investigated and presented, and a mathematical model is developed that predicts the performance of the algorithm.","PeriodicalId":215400,"journal":{"name":"2008 IEEE International Conference on Electro/Information Technology","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126535015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Image encryption scheme based on using least square approximation techniques","authors":"M. Al-khassaweneh, Selin Aviyente","doi":"10.1109/EIT.2008.4554276","DOIUrl":"https://doi.org/10.1109/EIT.2008.4554276","url":null,"abstract":"One of the main application of image encryption is to transmit secure information between parties. The aim is to transmit the image securely over the network such that no unauthorized user be able to decrypt the image. In this paper, we propose a new encryption algorithm by transforming the original image into the encrypted one using randomly generated vectors. The original image is decrypted by applying least square approximation techniques on the encrypted image and the randomly generated vectors. The method has been tested for a large number of images. The numerical results have demonstrated the effectiveness of the proposed algorithm and shown enhancement in security.","PeriodicalId":215400,"journal":{"name":"2008 IEEE International Conference on Electro/Information Technology","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124366449","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Some practical issues on implementing distributed multi-agent reasoning systems","authors":"Abdunnaser Diaf, N. Noroozi","doi":"10.1109/EIT.2008.4554263","DOIUrl":"https://doi.org/10.1109/EIT.2008.4554263","url":null,"abstract":"As intelligent systems are being applied to increasingly larger, open and more complex problem domains. These domains demand a systematic approach to handle the complexity in knowledge engineering. The needs include modularity in representation, distribution in computation, as well as coherence in inference. Multiply Sectioned Bayesian Networks provide a distributed multi-agent framework to address these needs. According to the framework, a large system is partitioned into subsystems and represented as a set of related Bayesian subnets. To ensure exact inference, partitioning of a large system into subsystems must follow a set of technical assumptions. In this paper, we propose a practical method that gives the answer of how to achieve concrescence of agentspsila believes in a distributed multi-agent system, instead of restricting them by an assumption of being consistent.","PeriodicalId":215400,"journal":{"name":"2008 IEEE International Conference on Electro/Information Technology","volume":"607 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116464850","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modification of power system linearization at the operating point to improve the stability in power systems including wind parks","authors":"Carlos Gallardo, P. Ledesma","doi":"10.1109/EIT.2008.4554292","DOIUrl":"https://doi.org/10.1109/EIT.2008.4554292","url":null,"abstract":"This paper shows a simple approach to modify power system linearization to improve stability in power systems including wind parks. In the case of a stable operating point with a poorly damped oscillatory mode, the objective is to increase the damping of that mode. That is, the power system linearization at the operating point is modified. Operator actions such as redispatch, varying load, varying reactive power (voltage) often modify the operating point to do this; the effect of this is that transients near enough to the operating point will decay more quickly. However, the analysis does not attempt the more difficult study of large signal transients. The existence of a stable operating point is of course necessary for system security, but there is no guarantee that large signal transients will result in operation at that operating point.","PeriodicalId":215400,"journal":{"name":"2008 IEEE International Conference on Electro/Information Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128903426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Euclidean ARTMAP based target tracking control system","authors":"Riyadh Kenaya, K. Cheok","doi":"10.1109/EIT.2008.4554265","DOIUrl":"https://doi.org/10.1109/EIT.2008.4554265","url":null,"abstract":"Neural networks are known for their ability to learn and classify patterns based on certain criteria defined within the training process. Fuzzy ARTMAP neural networks are examples of such systems where the output is decided based on the input/output pattern training scheme. In this research, we build a fuzzy ARTMAP like neural network that depends on an adaptive Euclidian distance neighborhood rather than the fuzzy AND neighborhood in deciding the network output. It is a supervised input/output clustering algorithm that calculates the Euclidean distance between input patterns and system stored categories (neurons) to determine the corresponding output even when that input pattern has never been seen. Euclidean ARTMAP neural network or better known as EARTMAP neural network is trained according to a certain algorithm that calculates the Euclidean distance and decides to whether include the new pattern in an already existing category (cluster) and update its position in the clustering map, or to consider it as a new category if it is far enough from all of the existing categories. The new location of a cluster center is found by averaging the location of all of the patterns that belong to the cluster itself. This would help in suppressing the white noise level that accompanies those patterns during training. The above mentioned algorithm is tested in a control experiment and worked as a human like system to track a moving target in the plane. The importance of EARTMAP neural network is its ability to imitate certain systems to give a performance that is close to the original performance with a minimum number of categories.","PeriodicalId":215400,"journal":{"name":"2008 IEEE International Conference on Electro/Information Technology","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132140971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}