{"title":"使用图形处理单元计算Voronoi图","authors":"Igor Majdandzic, C. Trefftz, G. Wolffe","doi":"10.1109/EIT.2008.4554342","DOIUrl":null,"url":null,"abstract":"A parallel algorithm to compute a discrete approximation to the Voronoi diagram is presented. The algorithm, which executes in single instruction multiple data (SIMD) mode, was implemented on a high-end graphics processing unit (GPU) using NVIDIApsilas compute unified device architecture (CUDA) development environment. The performance of the resulting code is investigated and presented, and a mathematical model is developed that predicts the performance of the algorithm.","PeriodicalId":215400,"journal":{"name":"2008 IEEE International Conference on Electro/Information Technology","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"Computation of Voronoi diagrams using a graphics processing unit\",\"authors\":\"Igor Majdandzic, C. Trefftz, G. Wolffe\",\"doi\":\"10.1109/EIT.2008.4554342\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A parallel algorithm to compute a discrete approximation to the Voronoi diagram is presented. The algorithm, which executes in single instruction multiple data (SIMD) mode, was implemented on a high-end graphics processing unit (GPU) using NVIDIApsilas compute unified device architecture (CUDA) development environment. The performance of the resulting code is investigated and presented, and a mathematical model is developed that predicts the performance of the algorithm.\",\"PeriodicalId\":215400,\"journal\":{\"name\":\"2008 IEEE International Conference on Electro/Information Technology\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-05-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE International Conference on Electro/Information Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EIT.2008.4554342\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE International Conference on Electro/Information Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EIT.2008.4554342","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Computation of Voronoi diagrams using a graphics processing unit
A parallel algorithm to compute a discrete approximation to the Voronoi diagram is presented. The algorithm, which executes in single instruction multiple data (SIMD) mode, was implemented on a high-end graphics processing unit (GPU) using NVIDIApsilas compute unified device architecture (CUDA) development environment. The performance of the resulting code is investigated and presented, and a mathematical model is developed that predicts the performance of the algorithm.
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